AT90LS8535-4JC Atmel, AT90LS8535-4JC Datasheet - Page 77
![IC MCU 8K 4MHZ A/D LV 44PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
AT90LS8535-4JC
Manufacturer Part Number
AT90LS8535-4JC
Description
IC MCU 8K 4MHZ A/D LV 44PLCC
Manufacturer
Atmel
Series
AVR® 90LSr
Specifications of AT90LS8535-4JC
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Port A as General Digital I/O
Port A Schematics
1041H–11/01
All eight pins in Port A have equal functionality when used as digital I/O pins.
PAn, general I/O pin: The DDAn bit in the DDRA register selects the direction of this pin.
If DDAn is set (one), PAn is configured as an output pin. If DDAn is cleared (zero), PAn
is configured as an input pin. If PORTAn is set (one) when the pin is configured as an
input pin, the MOS pull-up resistor is activated. To switch the pull-up resistor off, the
PORTAn has to be cleared (zero) or the pin has to be configured as an output pin.The
port pins are tri-stated when a reset condition becomes active, even if the clock is not
running.
Table 29. DDAn Effects on Port A Pins
Note:
Note that all port pins are synchronized. The synchronization latch is, however, not
shown in the figure.
Figure 51. Port A Schematic Diagrams (Pins PA0 - PA7)
DDAn
0
0
1
1
n: 7,6…0, pin number.
PORTAn
PAn
0
1
0
1
MOS
PULL-
UP
WP:
WD:
RL:
RP:
RD:
n:
WRITE PORTA
WRITE DDRA
READ PORTA LATCH
READ PORTA PIN
READ DDRA
0-7
Output
Output
Input
Input
I/O
PWRDN
Pull-up
Yes
No
No
No
Comment
Tri-state (high-Z)
PAn will source current if ext. pulled low
Push-pull Zero Output
Push-pull One Output
RL
RP
TO ADC MUX
Q
Q
AT90S/LS8535
PORTAn
RESET
RESET
DDAn
WD
WP
RD
C
C
D
D
ADCn
77
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