AT90LS8535-4JC Atmel, AT90LS8535-4JC Datasheet - Page 33
![IC MCU 8K 4MHZ A/D LV 44PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
AT90LS8535-4JC
Manufacturer Part Number
AT90LS8535-4JC
Description
IC MCU 8K 4MHZ A/D LV 44PLCC
Manufacturer
Atmel
Series
AVR® 90LSr
Specifications of AT90LS8535-4JC
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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8-bit Timer/Counter0
1041H–11/01
The clock source for Timer/Counter2 prescaler is named PCK2. PCK2 is by default con-
nected to the main system clock (CK). By setting the AS2 bit in ASSR, Timer/Counter2
prescaler is asynchronously clocked from the PC6(TOSC1) pin. This enables use of
Timer/Counter2 as a Real-time Clock (RTC). When AS2 is set, pins PC6(TOSC1) and
PC7(TOSC2) are disconnected from Port C. A crystal can then be connected between
the PC6(TOSC1) and PC7(TOSC2) pins to serve as an independent clock source for
Timer/Counter2. The oscillator is optimized for use with a 32.768 kHz crystal. Applying
an external clock source to TOSC1 is not recommended.
Figure 30 shows the block diagram for Timer/Counter0.
The 8-bit Timer/Counter0 can select clock source from CK, prescaled CK or an external
pin. In addition, it can be stopped as described in the specification for the
Timer/Counter0 Control Register (TCCR0). The overflow status flag is found in the
Timer/Counter Interrupt Flag Register (TIFR). Control signals are found in the
Timer/Counter0 Control Register (TCCR0). The interrupt enable/disable settings for
Timer/Counter0 are found in the Timer/Counter Interrupt Mask Register (TIMSK).
When Timer/Counter0 is externally clocked, the external signal is synchronized with the
oscillator frequency of the CPU. To assure proper sampling of the external clock, the
minimum time between two external clock transitions must be at least one internal CPU
clock period. The external clock signal is sampled on the rising edge of the internal CPU
clock.
The 8-bit Timer/Counter0 features both a high-resolution and a high-accuracy usage
with the lower prescaling opportunities. Similarly, the high prescaling opportunities make
the Timer/Counter0 useful for lower speed functions or exact timing functions with infre-
quent actions.
Figure 30. Timer/Counter0 Block Diagram
7
TIMER/COUNTER0
REGISTER (TIMSK)
TIMER INT. MASK
(TCNT0)
0
T/C0 OVER-
FLOW IRQ
T/C CLK SOURCE
REGISTER (TIFR)
TIMER INT. FLAG
AT90S/LS8535
CONTROL
LOGIC
REGISTER (TCCR0)
T/C0 CONTROL
CK
T0
33
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