PIC17C756/CL Microchip Technology, PIC17C756/CL Datasheet - Page 246
PIC17C756/CL
Manufacturer Part Number
PIC17C756/CL
Description
MICRO CTRL 16K MEMORY EPROM 68CL
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C752-16L.pdf
(304 pages)
3.PIC17C752-16L.pdf
(4 pages)
4.PIC17C752-16L.pdf
(6 pages)
5.PIC17C756CL.pdf
(321 pages)
Specifications of PIC17C756/CL
Core Processor
PIC
Core Size
8-Bit
Speed
33MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-CLCC Window, 68-CERQUAD
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA17XL681 - DEVICE ADAPTER FOR PIC17C752DM173001 - KIT DEVELOPMENT PICDEM17AC174007 - MODULE SKT PROMATEII 68PLCCAC164024 - ADAPTER PICSTART PLUS 68PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17C756/CL
Manufacturer:
MICROCH
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC17C752-16L PDF datasheet #2
- PIC17C752-16L PDF datasheet #3
- PIC17C752-16L PDF datasheet #4
- PIC17C756CL PDF datasheet #5
- Current page: 246 of 321
- Download datasheet (3Mb)
FIGURE 20-17: A/D CONVERSION TIMING
TABLE 20-18: A/D CONVERSION REQUIREMENTS
DS30264A-page 246
Note 1:
Param.
130
131
132
134
No.
Note 1:
*
†
§
2: See Section 16.1 for minimum conditions when input voltage has changed more then 1 LSb.
A/D DATA
SAMPLE
A/D CLK
ADRES
These parameters are characterized but not tested.
Data in “Typ” column is at 5V, 25 C unless otherwise stated. These parameters are for design guidance only and are not
tested.
This specification ensured by design.
ADRES register may be read on the following T
BSF ADCON0, GO
ADIF
GO
Q4
SLEEP instruction to be executed.
If the A/D clock source is selected as RC, a time of T
T
T
Sym
T
T
ACQ
CNV
AD
GO
132
Characteristic
A/D clock period
Conversion time
(not including acquisition time) (Note 1)
Acquisition time
Q4 to ADCLK start
(T
OSC
/2)
9
(1)
PIC17CXXX
PIC17LCXXX
PIC17CXXX
PIC17LCXXX
8
OLD_DATA
Preliminary
CY
7
cycle.
SAMPLING STOPPED
. . .
(Note 2)
2.0 *
3.0 *
12 §
CY
10 *
Min
1.6
3.0
—
131
130
is added before the A/D clock starts. This allows the
. . .
Tosc/2 §
Typ†
4.0
6.0
40
—
—
—
—
2
6.0 *
9.0 *
Max
13 §
—
—
—
—
—
1
Units
T
1 T
0
—
AD
s
s
s
s
s
s
CY
1997 Microchip Technology Inc.
T
T
A/D RC Mode
A/D RC Mode
The minimum time is the
amplifier settling time. This
may be used if the “new”
input voltage has not
changed by more than 1LSb
(i.e. 5mV @ 5.12V) from the
last sampled voltage (as
stated on C
If the A/D clock source is
selected as RC, a time of
T
clock starts. This allows the
sleep instruction to be exe-
cuted.
OSC
OSC
CY
NEW_DATA
is added before the A/D
DONE
based, V
based, V
Conditions
HOLD
REF
REF
).
full range
3.0V
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