SAK-TC1797-512F180E AC Infineon Technologies, SAK-TC1797-512F180E AC Datasheet - Page 56

• Manufacturer Part Number: SAK-TC1797-512F180E AC
• Description: IC MCU 32BIT FLASH 416-BGA
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1797-512F180E AC

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 180MHz
• Connectivity: ASC, CAN, EBI/EMI, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 219
• Program Memory Size: 4MB (4M x 8)
• Program Memory Type: FLASH
• Ram Size: 224K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 48x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 416-BGA
• Packages: PG-BGA-416
• Max Clock Frequency: 180.0 MHz
• Sram (incl. Cache): 224.0 KByte
• Can Nodes: 4
• A / D Input Lines (incl. Fadc): 48
• Program Memory: 4.0 MB
• For Use With: B158-H8537-G2-X-7600IN - KIT STARTER TC179X FAMILY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: SP000432392

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Features of the digital part of each ADC kernel:
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1) This value reflects the ADC module capability in an adapted electrical environment, e.g. characterized by
Data Sheet
“clean” routing of analog and digital signals and separation of analog and digital PCB areas, low noise on
analog power supply (< 30mV), low switching activity of digital pins near to the ADC, etc.
Input voltage range from 0V to analog supply voltage
Analog supply voltage range from 3.3 V to 5 V (single supply)
(5V nominal supply voltage, performance degradation accepted for lower voltages)
Input multiplexer width of 16 possible analog input channels (not all of them are
necessarily available on pins)
Performance for 12 bit resolution (@f
- conversion time about 2µs, TUE
- conversion time about 2µs, TUE of ±4 LSB
V
Programmable sample time (in periods of f
Wide range of accepted analog clock frequencies f
Multiplexer test mode (channel 7 input can be connected to ground via a resistor for
test purposes during run time by specific control bit)
Power saving mechanisms
Independent result registers (16 independent registers)
5 conversion request sources (e.g. for external events, auto-scan, programmable
sequence, etc.)
Synchronization of the ADC kernels for concurrent conversion starts
Control an external analog multiplexer, respecting the additional set up time
Programmable sampling times for different channels
Possibility to cancel running conversions on demand with automatic restart
Flexible interrupt generation (possibility of DMA support)
Limit checking to reduce interrupt load
Programmable data reduction filter by adding conversion results
Support of conversion data FIFO
Support of suspend and power down modes
Individually programmable reference selection for each channel (with exception of
dedicated channels always referring to V
AREF
and 1 alternative reference input at channel 0
1)
of ±4 LSB
ADCI
52
AREF
= 10 MHz):
ADCI
12
)
12
)
@ operating voltage 3.3 V
@ operating voltage 5 V
ADCI
Introduction
V1.1, 2009-04
TC1797