SAK-TC1762-128F66HL AC Infineon Technologies, SAK-TC1762-128F66HL AC Datasheet - Page 35
SAK-TC1762-128F66HL AC
Manufacturer Part Number
SAK-TC1762-128F66HL AC
Description
IC MCU 32BIT 1024KB FLSH 176LQFP
Manufacturer
Infineon Technologies
Series
TC17xxr
Datasheet
1.SAK-TC1762-128F80HL_AC.pdf
(114 pages)
Specifications of SAK-TC1762-128F66HL AC
Core Processor
TriCore
Core Size
32-Bit
Speed
66MHz
Connectivity
ASC, CAN, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
81
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
52K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 2x10b; A/D 32x8b,10b,12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
176-LFQFP
Packages
PG-LQFP-176
Max Clock Frequency
66.0 MHz
Sram (incl. Cache)
52.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
36
Program Memory
1.0 MB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Preliminary
3.6
The TC1762 interrupt system provides a flexible and time-efficient means of processing
interrupts. An interrupt request is serviced by the CPU, which is called the “Service
Provider”. Interrupt requests are called “Service Requests” rather than “Interrupt
Requests” in this document.
Each peripheral in the TC1762 can generate service requests. Additionally, the Bus
Control Units, the Debug Unit, and even the CPU itself can generate service requests to
the Service Provider.
As shown in
connected to one or multiple Service Request Nodes (SRN). Each SRN contains a
Service Request Control Register mod_SRCx, where “mod” is the identifier of the
service requesting unit and “x” an optional index. The CPU Interrupt Arbitration Bus
connects the SRNs with the Interrupt Control Unit (ICU), which arbitrates service
requests for the CPU and administers the CPU Interrupt Arbitration Bus.
The Debug Unit can generate service requests to the CPU. The CPU makes service
requests directly to itself (via the ICU). The CPU Service Request Nodes are activated
through software.
Depending on the selected system clock frequency f
per arbitration cycle must be selected as follows:
•
•
Data Sheet
f
f
SYS
SYS
< 60 MHz: ICR.CONECYC = 1
> 60 MHz: ICR.CONECYC = 0
Interrupt System
Figure
3-2, each TC1762 unit that can generate service requests is
31
SYS
, the number of f
Functional Description
SYS
V1.0, 2008-04
clock cycles
TC1762
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