SAK-XC2365B-40F80L Infineon Technologies, SAK-XC2365B-40F80L Datasheet - Page 48
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SAK-XC2365B-40F80L
Manufacturer Part Number
SAK-XC2365B-40F80L
Description
IC MCU 16BIT FLASH 100-LQFP
Manufacturer
Infineon Technologies
Series
XC23xxBr
Specifications of SAK-XC2365B-40F80L
Core Processor
C166SV2
Core Size
16/32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
320KB (320K x 8)
Program Memory Type
FLASH
Ram Size
34K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LSQFP
Processor Series
XC23xx
Core
C166S V2
Data Bus Width
32 bit
3rd Party Development Tools
PK166, CA166, AR166, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
SP000486208
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SAK-XC2365B-40F80L
Manufacturer:
Infineon Technologies
Quantity:
10 000
Company:
Part Number:
SAK-XC2365B-40F80L AA
Manufacturer:
Infineon Technologies
Quantity:
10 000
XC2361B, XC2363B, XC2364B, XC2365B
XC2000 Family / Value Line
Functional Description
3.6
Interrupt System
The architecture of the XC236xB supports several mechanisms for fast and flexible
response to service requests; these can be generated from various sources internal or
external to the microcontroller. Any of these interrupt requests can be programmed to be
serviced by the Interrupt Controller or by the Peripheral Event Controller (PEC).
Using a standard interrupt service the current program execution is suspended and a
branch to the interrupt vector table is performed. With the PEC just one cycle is ‘stolen’
from the current CPU activity to perform the PEC service. A PEC service implies a single
byte or word data transfer between any two memory locations with an additional
increment of either the PEC source pointer, the destination pointer, or both. An individual
PEC transfer counter is implicitly decremented for each PEC service except when
performing in the continuous transfer mode. When this counter reaches zero, a standard
interrupt is performed to the corresponding source-related vector location. PEC services
are particularly well suited to supporting the transmission or reception of blocks of data.
The XC236xB has eight PEC channels, each with fast interrupt-driven data transfer
capabilities.
1)
With a minimum interrupt response time of 7/11
CPU clocks, the XC236xB can react
quickly to the occurrence of non-deterministic events.
Interrupt Nodes and Source Selection
The interrupt system provides 96 physical nodes with separate control register
containing an interrupt request flag, an interrupt enable flag and an interrupt priority bit
field. Most interrupt sources are assigned to a dedicated node. A particular subset of
interrupt sources shares a set of nodes. The source selection can be programmed using
the interrupt source selection (ISSR) registers.
External Request Unit (ERU)
A dedicated External Request Unit (ERU) is provided to route and preprocess selected
on-chip peripheral and external interrupt requests. The ERU features 4 programmable
input channels with event trigger logic (ETL) a routing matrix and 4 output gating units
(OGU). The ETL features rising edge, falling edge, or both edges event detection. The
OGU combines the detected interrupt events and provides filtering capabilities
depending on a programmable pattern match or miss.
Trap Processing
The XC236xB provides efficient mechanisms to identify and process exceptions or error
conditions that arise during run-time, the so-called ‘Hardware Traps’. A hardware trap
causes an immediate system reaction similar to a standard interrupt service (branching
1) Depending if the jump cache is used or not.
Data Sheet
48
V1.2, 2010-04