SAK-XC2365B-40F80L Infineon Technologies, SAK-XC2365B-40F80L Datasheet - Page 25
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SAK-XC2365B-40F80L
Manufacturer Part Number
SAK-XC2365B-40F80L
Description
IC MCU 16BIT FLASH 100-LQFP
Manufacturer
Infineon Technologies
Series
XC23xxBr
Specifications of SAK-XC2365B-40F80L
Core Processor
C166SV2
Core Size
16/32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
320KB (320K x 8)
Program Memory Type
FLASH
Ram Size
34K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LSQFP
Processor Series
XC23xx
Core
C166S V2
Data Bus Width
32 bit
3rd Party Development Tools
PK166, CA166, AR166, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
SP000486208
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SAK-XC2365B-40F80L
Manufacturer:
Infineon Technologies
Quantity:
10 000
Company:
Part Number:
SAK-XC2365B-40F80L AA
Manufacturer:
Infineon Technologies
Quantity:
10 000
Table 6
Pin
56
57
58
Data Sheet
Symbol
P2.8
U0C1_SCLK
OUT
EXTCLK
CC2_CC21
A21
U0C1_DX1D
P2.9
U0C1_DOUT O1
TxDC1
CC2_CC22
A22
CLKIN1
TCK_A
P0.2
U1C0_SCLK
OUT
TxDC0
CCU61_CC6
2
A2
U1C0_DX1B
CCU61_CC6
2INA
Pin Definitions and Functions (cont’d)
Ctrl.
O0 / I DP/B Bit 8 of Port 2, General Purpose Input/Output
O1
O2
O3 / I DP/B CAPCOM2 CC21IO Capture Inp./ Compare Out.
OH
I
O0 / I St/B
O2
O3 / I St/B
OH
I
IH
O0 / I St/B
O1
O2
O3
OH
I
I
Type Function
DP/B USIC0 Channel 1 Shift Clock Output
DP/B Programmable Clock Signal Output
DP/B External Bus Interface Address Line 21
DP/B USIC0 Channel 1 Shift Clock Input
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
1)
Bit 9 of Port 2, General Purpose Input/Output
USIC0 Channel 1 Shift Data Output
CAN Node 1 Transmit Data Output
CAPCOM2 CC22IO Capture Inp./ Compare Out.
External Bus Interface Address Line 22
Clock Signal Input 1
DAP0/JTAG Clock Input
If JTAG pos. A is selected during start-up, an
internal pull-up device will hold this pin high when
nothing is driving it.
If DAP pos. 0 is selected during start-up, an
internal pull-down device will hold this pin low
when nothing is driving it.
Bit 2 of Port 0, General Purpose Input/Output
USIC1 Channel 0 Shift Clock Output
CAN Node 0 Transmit Data Output
CCU61 Channel 2 Output
External Bus Interface Address Line 2
USIC1 Channel 0 Shift Clock Input
CCU61 Channel 2 Input
XC2361B, XC2363B, XC2364B, XC2365B
25
XC2000 Family / Value Line
General Device Information
V1.2, 2010-04