UPD78F1146AGB-GAH-AX Renesas Electronics America, UPD78F1146AGB-GAH-AX Datasheet - Page 168
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UPD78F1146AGB-GAH-AX
Manufacturer Part Number
UPD78F1146AGB-GAH-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1146AGB-GAH-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1146AGB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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(4) Example of setting procedure when stopping the high-speed system clock
<3> If some peripheral hardware macros are not used, supply of the input clock to each hardware macro can
The high-speed system clock can be stopped (disabling clock input if the external clock is used) in the following
two ways.
• Executing the STOP instruction
• Setting MSTOP to 1
(a) To execute a STOP instruction
<1> Setting to stop peripheral hardware
<2> Setting the X1 clock oscillation stabilization time after STOP mode is released
<3> Executing the STOP instruction
be stopped.
(PER0 register)
Remark RTCEN:
Caution Be sure to clear bits 1 and 6 of PER0 register to 0.
RTCEN
xxxEN
Stop peripheral hardware that cannot be used in the STOP mode (for peripheral hardware that
cannot be used in STOP mode, see CHAPTER 17 STANDBY FUNCTION).
If the X1 clock oscillates before the STOP mode is entered, set the value of the OSTS register before
executing the STOP instruction.
When the STOP instruction is executed, the system is placed in the STOP mode and X1 oscillation is
stopped (the input of the external clock is disabled).
0
1
ADCEN:
IIC0EN:
SAU1EN: Control of the serial array unit 1 input clock
SAU0EN: Control of the serial array unit 0 input clock
TAU0EN: Control of the timer array unit input clock
Stops input clock supply.
Supplies input clock.
0
Control of the real-time counter input clock
Control of the A/D converter input clock
Control of the serial interface IIC0 input clock
ADCEN
CHAPTER 5 CLOCK GENERATOR
User’s Manual U17854EJ9V0UD
IIC0EN
Input clock control
SAU1EN
SAU0EN
0
TAU0EN
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