UPD78F1143AGK-GAJ-AX Renesas Electronics America, UPD78F1143AGK-GAJ-AX Datasheet - Page 828
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UPD78F1143AGK-GAJ-AX
Manufacturer Part Number
UPD78F1143AGK-GAJ-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1143AGK-GAJ-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1143AGK-GAJ-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Memory
space
Processor
registers
Port
functions
Function
Internal data
memory space
SFR: Special
function register
area
2nd SFR:
Extended
special function
register
SP: Stack
pointer
General-purpose
registers
P01/TO00,
P05/TI05/TO05,
P06/TI06/TO06
P02/SO10/TxD1,
P03/SI10/RxD1/
SDA10,
P04/SCK10/
SCL10
P10/SCK00/,
P11/SI00/RxD0,
P12/SO00/TxD0
P13/TxD3,
P14/RxD3
Details of
Function
It is prohibited to use the general-purpose register (FFEE0H to FFEFFH) space for
fetching instructions or as a stack area.
While using the self-programming function, the area of FFE20H to FFEFFH cannot
be used as a stack memory. Furthermore, the areas of FCF00H to FD6FFH cannot
be used with the
Do not access addresses to which SFRs are not assigned.
Do not access addresses to which extended SFR is not assigned.
Since reset signal generation makes the SP contents undefined, be sure to initialize
the SP before using the stack.
The values of the stack pointer must be set to even numbers. If odd numbers are
specified, the least significant bit is automatically cleared to 0.
It is prohibited to use the general-purpose register (FFEE0H to FFEFFH) space as a
stack area.
While using the self-programming function, the area of FFE20H to FFEFFH cannot
be used as a stack memory. Furthermore, the areas of FCF00H to FD6FFH cannot
be used with the
It is prohibited to use the general-purpose register (FFEE0H to FFEFFH) space for
fetching instructions or as a stack area.
To use P01/TO00, P05/TI05/TO05, or P06/TI06/TO06 as a general-purpose port, set
bits 0, 5,and 6 (TO00, TO05, TO06) of timer output register 0 (TO0) and bits 0, 5, and
6 (TOE00, TOE05,TOE06) of timer output enable register 0 (TOE0) to “0”, which is
the same as their default status setting.
To use P02/SO10/TxD1, P03/SI10/RxD1/SDA10, or P04/SCK10/SCL10 as a
general-purpose port, note the serial array unit 0 setting. For details, refer to the
following tables.
• Table 11-7 Relationship Between Register Settings and Pins (Channel 2 of Unit 0:
• Table 11-8 Relationship Between Register Settings and Pins (Channel 3 of Unit 0:
To use P10/SCK00, P11/SI00/RxD0, P12/SO00/TxD0, P13/TxD3, or P14/RxD3 as a
general-purpose port, note the serial array unit setting.
following tables.
• Table 11-5 Relationship Between Register Settings and Pins (Channel 0 of Unit 0:
• Table 11-6 Relationship Between Register Settings and Pins (Channel 1 of Unit 0:,
• Table 11-9 Relationship Between Register Settings and Pins (Channel 2 of Unit 1:
• Table 11-10 Relationship Between Register Settings and Pins (Channel 3 of Unit 1:
CSI10, UART1 Transmission, IIC10)
UART1 Reception)
CSI00, UART0 Transmission)
UART0 Reception)
UART3 Transmission)
UART3 Reception)
APPENDIX B LIST OF CAUTIONS
User’s Manual U17854EJ9V0UD
μ
μ
PD78F1146 and 78F1146A.
PD78F1146 and 78F1146A.
Cautions
For details, refer to the
p.56
p.56
pp.57,
68
pp.57,
74
p.64
p.64
p.64
p.64
p.65
p.96
p.96
p.101
Page
(2/33)
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