UPD78F1142AGK-GAJ-AX Renesas Electronics America, UPD78F1142AGK-GAJ-AX Datasheet - Page 622
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UPD78F1142AGK-GAJ-AX
Manufacturer Part Number
UPD78F1142AGK-GAJ-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1142AGK-GAJ-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1142AGK-GAJ-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Notes 1.
620
Program counter (PC)
Stack pointer (SP)
Program status word (PSW)
RAM
Port registers (P0 to P7, P12 to P14) (output latches)
Port mode registers (PM0 to PM7, PM12, PM14)
Port input mode register 0 (PIM0)
Port output mode register 0 (POM0)
Pull-up resistor option registers (PU0, PU1, PU3 to PU5, PU7, PU12, PU14)
Clock operation mode control register (CMC)
Clock operation status control register (CSC)
Processor mode control register (PMC)
System clock control register (CKC)
Oscillation stabilization time counter status register (OSTC)
Oscillation stabilization time select register (OSTS)
Noise filter enable registers 0, 1 (NFEN0, NFEN1)
Peripheral enable registers 0 (PER0)
Internal high-speed oscillator trimming register (HIOTRM)
Operation speed mode control register (OSMC)
Timer array unit
(TAU)
2.
During reset signal generation or oscillation stabilization time wait, only the PC contents among the
hardware statuses become undefined. All other hardware statuses remain unchanged after reset.
When a reset is executed in the standby mode, the pre-reset status is held even after reset.
Timer data registers 00, 01, 02, 03, 04, 05, 06, 07 (TDR00, TDR01, TDR02,
TDR03, TDR04, TDR05, TDR06, TDR07)
Timer mode registers 00, 01, 02, 03, 04, 05, 06, 07 (TMR00, TMR01, TMR02,
TMR03, TMR04, TMR05, TMR06, TMR07)
Timer status registers 00, 01, 02, 03, 04, 05, 06, 07 (TSR00, TSR01, TSR02,
TSR03, TSR04, TSR05, TSR06, TSR07)
Timer input select register 0 (TIS0)
Timer counter registers 00, 01, 02, 03, 04, 05, 06, 07 (TCR00, TCR01, TCR02,
TCR03, TCR04, TCR05, TCR06, TCR07)
Timer channel enable status register 0 (TE0)
Timer channel start trigger register 0 (TS0)
Timer channel stop trigger register 0 (TT0)
Timer clock select register 0 (TPS0)
Timer output register 0 (TO0)
Timer output enable register 0 (TOE0)
Timer output level register 0 (TOL0)
Timer output mode register 0 (TOM0)
Data memory
General-purpose registers
Table 18-2. Hardware Statuses After Reset Acknowledgment (1/3)
Hardware
CHAPTER 18 RESET FUNCTION
User’s Manual U17854EJ9V0UD
The contents of the
reset vector table
(0000H, 0001H) are set.
Undefined
06H
Undefined
Undefined
00H
FFH
00H
00H
00H
00H
C0H
00H
09H
00H
07H
00H
00H
10H
00H
0000H
0000H
0000H
00H
FFFFH
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
Acknowledgment
After Reset
Note 2
Note 2
Note 1
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