UPD78F1142AGB-GAH-AX Renesas Electronics America, UPD78F1142AGB-GAH-AX Datasheet - Page 58
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD78F1142AGB-GAH-AX
Manufacturer Part Number
UPD78F1142AGB-GAH-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1142AGB-GAH-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1142AGB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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• Processor mode control register (PMC)
3.1.3 Internal data memory space
Four general-purpose register banks consisting of eight 8-bit registers per bank are assigned to the 32-byte area of
FFEE0H to FFEFFH of the internal RAM area. However, instructions cannot be executed by using general-purpose
registers.
56
This register selects the flash memory space for mirroring to area from F0000H to FFFFFH.
PMC can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
Cautions 1. Set PMC only once during the initial settings prior to operating the DMA controller. Rewriting
78K0R/KE3 products incorporate the following RAMs.
The internal RAM can be used as a data area and a program area where instructions are written and executed.
The internal RAM is used as a stack memory.
Cautions 1. It is prohibited to use the general-purpose register (FFEE0H to FFEFFH) space for fetching
Address: FFFFEH After reset: 00H R/W
Symbol
PMC
2. After setting PMC, wait for at least one instruction and access the mirror area.
3. When the
2. While using the self-programming function, the area of FFE20H to FFEFFH cannot be used as
Figure 3-6. Format of Configuration of Processor Mode Control Register (PMC)
PMC other than during the initial settings is prohibited.
instructions or as a stack area.
a stack memory. Furthermore, the areas of FCF00H to FD6FFH cannot be used with the
μ
PD78F1146 and 78F1146A,.
μ
μ
μ
μ
μ
PD78F1142, 78F1142A
PD78F1143, 78F1143A
PD78F1144, 78F1144A
PD78F1145, 78F1145A
PD78F1146, 78F1146A
MAA
7
0
0
1
μ
Part Number
PD78F1142 or 78F1142A is used, be sure to set bit 0 (MAA) of this register to 0.
00000H to 0FFFFH is mirrored to F0000H to FFFFFH
10000H to 1FFFFH is mirrored to F0000H to FFFFFH
Selection of flash memory space for mirroring to area from F0000H to FFFFFH
6
0
Table 3-4. Internal RAM Capacity
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U17854EJ9V0UD
5
0
4096 × 8 bits (FEF00H to FFEFFH)
6144 × 8 bits (FE700H to FFEFFH)
8192 × 8 bits (FDF00H to FFEFFH)
10240 × 8 bits (FD700H to FFEFFH)
12288 × 8 bits (FCF00H to FFEFFH)
4
0
Internal RAM
3
0
2
0
1
0
MAA
<0>
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