UPD78F1142AGA-HAB-AX Renesas Electronics America, UPD78F1142AGA-HAB-AX Datasheet - Page 532
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UPD78F1142AGA-HAB-AX
Manufacturer Part Number
UPD78F1142AGA-HAB-AX
Description
MCU 16BIT 78K0R/KX3 64-TQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1142AGA-HAB-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1142AGA-HAB-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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530
(4) Operation without communication
Remark
(5) Arbitration loss operation (operation as slave after arbitration loss)
Remark
ST
1: IICS0 = 00000001B
ST
1: IICS0 = 0101×110B
2: IICS0 = 0001×000B
3: IICS0 = 0001×000B
4: IICS0 = 00000001B
(a) Start ~ Code ~ Data ~ Data ~ Stop
When the device is used as a master in a multi-master system, read the MSTS0 bit each time interrupt request
signal INTIIC0 has occurred to check the arbitration result.
(a) When arbitration loss occurs during transmission of slave address data
AD6 to AD0 R/W ACK
AD6 to AD0 R/W ACK
(i) When WTIM0 = 0
×:
: Generated only when SPIE0 = 1
: Always generated
: Generated only when SPIE0 = 1
Don’t care
1
D7 to D0
D7 to D0
CHAPTER 12 SERIAL INTERFACE IIC0
User’s Manual U17854EJ9V0UD
ACK
ACK
2
D7 to D0
D7 to D0
ACK
ACK
3
SP
SP
4
1
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