UPD78F9222MC-5A4-A Renesas Electronics America, UPD78F9222MC-5A4-A Datasheet - Page 402

• Manufacturer Part Number: UPD78F9222MC-5A4-A
• Description: MCU 8BIT 4KB FLASH 20PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9222MC-5A4-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

400
Low-voltage
detector
Option byte
Function
LVIM: Low-
voltage detect
register
LVIS: Low-
voltage
detection level
select register
When used as
reset
Cautions for
low-voltage
detector
Oscillation
stabilization
time on power
application or
after reset
release
Control of
RESET pin
Selection of
system clock
source
Low-speed
internal
oscillates
Details of
Function
The system may be repeatedly reset and released from the reset status.
In this case, the time from release of reset to the start of the operation of the
microcontroller can be arbitrarily set by taking action (1) below.
To stop LVI, follow either of the procedures below.
Be sure to set bits 2 to 6 to 0.
Bits 4 to 7 must be set to 0.
If values other than same values are written during LVI operation, the value
becomes undefined at the very moment it is written, and thus be sure to stop
LVI (bit 7 of LVIM register (LVION) = 0) before writing.
<1> must always be executed. When LVIMK = 0, an interrupt may occur
immediately after the processing in <3>.
If supply voltage (V
internal reset signal is not generated.
In a system where the supply voltage (V
vicinity of the LVI detection voltage (V
on how the low-voltage detector is used.
<1> When used as reset
<2> When used as interrupt
Interrupt requests may be frequently generated. Take (b) of action (2) below.
The setting of this option is valid only when the crystal/ceramic oscillation clock
is selected as the system clock source. No wait time elapses if the high-speed
internal oscillation clock or external clock input is selected as the system clock
source.
Because the option byte is referenced after reset release, if a low level is input
to the RESET pin before the option byte is referenced, then the reset state is
not released.
Also, when setting 0 to RMCE, connect the pull-up resistor.
Because the X1 and X2 pins are also used as the P121 and P122 pins, the
conditions under which the X1 and X2 pins can be used differ depending on the
selected system clock source.
(1) Crystal/ceramic oscillation clock is selected
The X1 and X2 pins cannot be used as I/O port pins because they are used as
clock input pins.
(2) External clock input is selected
Because the X1 pin is used as an external clock input pin, P121 cannot be used
as an I/O port pin.
(3) High-speed internal oscillation clock is selected
P121 and P122 can be used as I/O port pins.
If it is selected that low-speed internal oscillator cannot be stopped, the count
clock to the watchdog timer (WDT) is fixed to low-speed internal oscillation
clock.
When using 8-bit manipulation instruction: Write 00H to LVIM.
When using 1-bit memory manipulation instruction: Clear LVION to 0.
APPENDIX D LIST OF CAUTIONS
User’s Manual U16898EJ6V0UD
DD
)
detection voltage (V
Cautions
LVI
), the operation is as follows depending
DD
) fluctuates for a certain period in the
LVI
) when LVIM is set to 1, an
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