UPD78F9222MC-5A4-A Renesas Electronics America, UPD78F9222MC-5A4-A Datasheet - Page 236
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UPD78F9222MC-5A4-A
Manufacturer Part Number
UPD78F9222MC-5A4-A
Description
MCU 8BIT 4KB FLASH 20PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet
1.UPD78F9221MC-5A4-A.pdf
(418 pages)
Specifications of UPD78F9222MC-5A4-A
Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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UPD78F9222MC-5A4-A
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set are held. The I/O port output latches and output buffer statuses are also held.
234
Cautions 1. When shifting to the STOP mode, be sure to stop the peripheral hardware operation before
(2) STOP mode
In either of these two modes, all the contents of registers, flags and data memory just before the standby mode is
STOP instruction execution sets the STOP mode. In the STOP mode, the system clock oscillator stops,
stopping the whole system, thereby considerably reducing the CPU operating current.
Because this mode can be cleared by an interrupt request, it enables intermittent operations to be carried out.
However, select the HALT mode if processing must be immediately started by an interrupt request when the
operation stop time
stabilizing oscillation elapses when crystal/ceramic oscillation is used).
Note The operation stop time is 17 s (MIN.), 34 s (TYP.), and 67 s (MAX.).
2. The following sequence is recommended for operating current reduction of the A/D converter
3. If the low-speed internal oscillator is operating before the STOP mode is set, oscillation of the
executing STOP instruction (except the peripheral hardware that operates on the low-speed
internal oscillation clock).
when the standby function is used: First clear bit 7 (ADCS) and bit 0 (ADCE) of the A/D
converter mode register (ADM) to 0 to stop the A/D conversion operation, and then execute
the HALT or STOP instruction.
low-speed internal oscillation clock cannot be stopped in the STOP mode (refer to Table 13-1).
Note
is generated after the STOP mode is released (because an additional wait time for
CHAPTER 13 STANDBY FUNCTION
User’s Manual U16898EJ6V0UD
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