SC5554MVR132 Freescale Semiconductor, SC5554MVR132 Datasheet - Page 11

• Manufacturer Part Number: SC5554MVR132
• Description: MCU MPC5554 DP ONLY 416-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC55xx Qorivvar

Specifications of SC5554MVR132

• Core Processor: e200z6
• Core Size: 32-Bit
• Speed: 132MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 256
• Program Memory Size: 2MB (2M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.35 V ~ 1.65 V
• Data Converters: A/D 40x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 416-PBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Furthermore, when all of the PORs negate, the system clock starts to toggle, adding another large increase
of the current consumed by V
consumed can drop V
1.5 V POR asserts and stops the system clock, causing the voltage on V
negates again. All oscillations stop when V
When powering down, V
capacitors internal and external to the device are already charged. When not powering up or down, no delta
between V
There are no power up/down sequencing requirements to prevent issues such as latch-up, excessive current
spikes, and so on. Therefore, the state of the I/O pins during power up and power down varies depending
on which supplies are powered.
Table 7
Table 8
pad_sh (slow type).
The values in
during power up.
Before exiting the internal POR state, the pins go to a high-impedance state until POR negates. When the
internal POR negates, the functional state of the signal during reset applies and the weak-pull devices
(up or down) are enabled as defined in the device reference manual. If V
propagate the logic signals, the weak-pull devices can pull the signals to V
To avoid this condition, minimize the ramp time of the V
required to enable the external circuitry connected to the device outputs.
Freescale Semiconductor
gives the pin state for the sequence cases for all pins with pad type pad_fc (fast type).
gives the pin state for the sequence cases for all pins with pad type pad_mh (medium type) and
RC33
Table 7
V
V
V
V
Table 8. Pin Status for Medium and Slow Pads During the Power Sequence
and V
Low
DDEH
DDEH
DDEH
DDEH
V
V
V
V
V
V
Low
DDE
DDE
DDE
DDE
DDE
DDE
DD
DDSYN
and
Table 7. Pin Status for Fast Pads During the Power Sequence
V
Low
V
V
V
V
V
V
—
Low
Low
RC33
low enough to assert the 1.5 V POR again. Oscillations are possible when the
DD
DD
DD
DD33
DD33
DD33
DD33
—
Table 8
is required for the V
RC33
and V
Asserted
Asserted
Asserted
Negated
MPC5554 Microcontroller Data Sheet, Rev. 3.0
POR
V
Low
V
Low
V
V
—
do not include the effect of the weak-pull devices on the output pins
. If V
DD
DD
DD
DD
DDSYN
RC33
Asserted
Asserted
Asserted
Asserted
Asserted
Negated
POR
RC33
Pin Status for Medium and Slow Pad Output Driver
have no delta requirement to each other, because the bypass
lags V
is powered sufficiently.
RC
pad_mh (medium) pad_sh (slow)
DDSYN
to operate within specification.
Pin Status for Fast Pad Output Driver
High impedance (Hi-Z)
DD
by more than 100 mV, the increase in current
High impedance (Hi-Z)
supply to a time period less than the time
Functional
Low
Hi-Z
pad_fc (fast)
Functional
High
High
Hi-Z
Low
DD
DD
DDE
to rise until the 1.5 V POR
is too low to correctly
and V
Electrical Characteristics
DDEH
.
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