C8051F121-GQR Silicon Laboratories Inc, C8051F121-GQR Datasheet - Page 201
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C8051F121-GQR
Manufacturer Part Number
C8051F121-GQR
Description
IC 8051 MCU FLASH 128K 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F12xr
Specifications of C8051F121-GQR
Core Processor
8051
Core Size
8-Bit
Speed
100MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
C8051F1x
Core
8051
Data Bus Width
8 bit
Data Ram Size
8.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
32
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F120DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
On-chip Dac
12 bit, 2 Channel
For Use With
336-1224 - DEVKIT-F120/21/22/23/24/25/26/27
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F121-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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15.1.2. Erasing Flash Pages From Software
When erasing Flash memory, an entire page is erased (all bytes in the page are set to 0xFF). The Flash
memory is organized in 1024-byte pages. The 256 bytes of Scratchpad area (addresses 0x20000 to
0x200FF) consists of two 128 byte pages. To erase any Flash page, the FLWE, PSWE, and PSEE bits
must be set to ‘1’, and a byte must be written using a MOVX instruction to any address within that page.
The following is the recommended procedure for erasing a Flash page from software:
Figure 15.1. Flash Memory Map for MOVC Read and MOVX Write Operations
Step 1. Disable interrupts.
Step 2. If erasing a page in Bank 1, Bank 2, or Bank 3, set the COBANK bits (PSBANK.5-4) for
Step 3. If erasing a page in the Scratchpad area, set the SFLE bit (PSCTL.2).
Step 4. Set FLWE (FLSCL.0) to enable Flash writes/erases via user software.
Step 5. Set PSEE (PSCTL.1) to enable Flash erases.
Step 6. Set PSWE (PSCTL.0) to redirect MOVX commands to write to Flash.
Step 7. Use the MOVX instruction to write a data byte to any location within the page to be
Step 8. Clear PSEE to disable Flash erases.
Step 9. Clear the PSWE bit to redirect MOVX commands to the XRAM data space.
Step 10. Clear the FLWE bit, to disable Flash writes/erases.
Step 11. If erasing a page in the Scratchpad area, clear the SFLE bit.
Step 12. Re-enable interrupts.
the appropriate bank.
erased.
COBANK = 0 COBANK = 1 COBANK = 2 COBANK = 3
Bank 0
Bank 0
Bank 1
Bank 0
SFLE = 0
128k FLASH devices only.
Bank 2
Bank 0
Rev. 1.4
C8051F120/1/2/3/4/5/6/7
Bank 3
Bank 0
Scratchpad
Undefined
SFLE = 1
Areas (2)
C8051F130/1/2/3
Address
0xFFFF
Internal
0x7FFF
0x00FF
0x8000
0x0000
201
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