C8051F121-GQR Silicon Laboratories Inc, C8051F121-GQR Datasheet - Page 200
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C8051F121-GQR
Manufacturer Part Number
C8051F121-GQR
Description
IC 8051 MCU FLASH 128K 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F12xr
Specifications of C8051F121-GQR
Core Processor
8051
Core Size
8-Bit
Speed
100MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
C8051F1x
Core
8051
Data Bus Width
8 bit
Data Ram Size
8.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
32
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F120DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
On-chip Dac
12 bit, 2 Channel
For Use With
336-1224 - DEVKIT-F120/21/22/23/24/25/26/27
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F121-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
- Current page: 200 of 350
- Download datasheet (2Mb)
C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
15.1.1. Non-volatile Data Storage
The Flash memory can be used for non-volatile data storage as well as program code. This allows data
such as calibration coefficients to be calculated and stored at run time. Data is written and erased using the
MOVX write instruction (as described in
instruction. The COBANK bits in register PSBANK (SFR Definition 11.1) control which portion of the Flash
memory is targeted by writes and erases of addresses above 0x07FFF. For devices with 64 kB of Flash.
the COBANK bits should always remain set to ‘01’ to ensure that Flash write, erase, and read operations
are valid.
Two additional 128-byte sectors (256 bytes total) of Flash memory are included for non-volatile data stor-
age. The smaller sector size makes them particularly well suited as general purpose, non-volatile scratch-
pad memory. Even though Flash memory can be written a single byte at a time, an entire sector must be
erased first. In order to change a single byte of a multi-byte data set, the data must be moved to temporary
storage. The 128-byte sector-size facilitates updating data without wasting program memory or RAM
space. The 128-byte sectors are double-mapped over the normal Flash memory for MOVC reads and
MOVX writes only; their addresses range from 0x00 to 0x7F and from 0x80 to 0xFF (see Figure 15.2). To
access the 128-byte sectors, the SFLE bit in PSCTL must be set to logic 1. Code execution from the 128-
byte Scratchpad areas is not permitted. The 128-byte sectors can be erased individually, or both at the
same time. To erase both sectors simultaneously, the address 0x0400 should be targeted during the erase
operation with SFLE set to ‘1’. See Figure 15.1 for the memory map under different COBANK and SFLE
settings.
200
V
Flash Size
Flash Size
Endurance
Erase Cycle Time
Write Cycle Time
Notes:
DD
1. Includes 256-byte Scratch Pad Area
2. 1024 Bytes at location 0x1FC00 to 0x1FFFF are reserved.
= 2.7 to 3.6 V; –40 to +85 °C
Parameter
1
1
C8051F12x and C8051F130/1
C8051F132/3
Table 15.1. Flash Electrical Characteristics
Conditions
Section 15.1.2
Rev. 1.4
and
Section 15.1.3
Min
20k
10
40
131328
65792
100k
Typ
12
50
) and read using the MOVC
2
Max
14
60
Erase/Write
Units
Bytes
Bytes
ms
µs
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