MC68331CEH25 Freescale Semiconductor, MC68331CEH25 Datasheet - Page 21

• Manufacturer Part Number: MC68331CEH25
• Description: IC MCU 32BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68331CEH25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 18
• Cpu Speed: 25MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Data Ram Size: 80 B
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

PITR —Periodic Interrupt Timer Register
PIV[7:0] —Periodic Interrupt Vector
PTP —Periodic Timer Prescaler Control
PITM[7:0] —Periodic Interrupt Timing Modulus Field
3.3 System Clock
MC68331TS/D
RESET:
15
0
0
The bits of this field contain the vector generated in response to an interrupt from the periodic timer.
When the SIM responds, the periodic interrupt vector is placed on the bus.
The PITR contains the count value for the periodic timer. A zero value turns off the periodic timer. This
register can be read or written at any time.
The reset state of PTP is the complement of the state of the MODCLK signal during reset.
This is an 8-bit timing modulus. The period of the timer can be calculated as follows:
where
The system clock in the SIM provides timing signals for the IMB modules and for an external peripheral
bus. Because MCU operation is fully static, register and memory contents are not affected when the
clock rate changes. System hardware and software support changes in the clock rate during operation.
The system clock signal can be generated in three ways. An internal phase-locked loop can synthesize
the clock from an internal or external frequency source, or the clock signal can be input from an external
source.
Following is a block diagram of the clock submodule.
0 = Periodic timer clock not prescaled
1 = Periodic timer clock prescaled by a value of 512
14
0
0
PIT Period = Periodic interrupt timer period
PITM = Periodic interrupt timer register modulus (PITR[7:0])
EXTAL Frequency = Crystal frequency
Prescale = 512 or 1 depending on the state of the PTP bit in the PITR
13
0
0
12
0
0
Freescale Semiconductor, Inc.
11
0
0
For More Information On This Product,
PIRQL
000
001
010
011
100
101
110
111
10
0
0
PIT Period = [(PITM)(Prescaler)(4)]/EXTAL
Go to: www.freescale.com
9
0
0
Periodic Interrupt Disabled
MODCLK
Interrupt Request Level 1
Interrupt Request Level 2
Interrupt Request Level 3
Interrupt Request Level 4
Interrupt Request Level 5
Interrupt Request Level 6
Interrupt Request Level 7
Interrupt Request Level
PTP
8
7
0
0
0
0
PITM
0
0
$YFFA24
0
0
0
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