MC68HC16Z1CEH25 Freescale Semiconductor, MC68HC16Z1CEH25 Datasheet - Page 443

• Manufacturer Part Number: MC68HC16Z1CEH25
• Description: IC MCU 16BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CEH25

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Package: 132PQFP
• Family Name: HC16
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 16
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 11
• Controller Family/series: 68HC16
• No. Of I/o's: 16
• Ram Memory Size: 1KB
• Cpu Speed: 25MHz
• No. Of Timers: 2
• Embedded Interface Type: QSPI, SCI
• Rohs Compliant: Yes
• Processor Series: HC16Z
• Core: CPU16
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

IPL[2:0] — Interrupt Priority Level
IVBA[3:0] — Interrupt Vector Base Address
D.8.4 Port GP Data Direction Register/Data Register
DDRGP/PORTGP — Port GP Data Direction Register/Data Register
DDGP[7:0] — Port GP Data Direction Register
D.8.5 OC1 Action Mask Register/Data Register
OC1M/OC1D — OC1 Action Mask Register/OC1 Action Data Register
M68HC16 Z SERIES
USER’S MANUAL
15
15
0
0
RESET:
RESET:
This field specifies the priority level of interrupts generated by the GPT.
Most significant nibble of interrupt vector numbers generated by the GPT. Refer to
ble
When GPT pins are used as an 8-bit port, DDRGP determines whether pins are input
or output and PORTGP holds the 8-bit data.
All OC outputs can be controlled by the action of OC1. OC1M contains a mask that
determines which pins are affected. OC1D determines what the outputs are.
0 = Input only
1 = Output
D-43.
14
14
0
0
OC1M[5:1]
IC4/OC5
PAOV
Name
13
13
OC1
OC2
OC3
OC4
0
0
IC1
IC2
IC3
PAI
TO
—
12
12
DDGP[7:0]
0
0
Freescale Semiconductor, Inc.
11
11
Source Number
0
0
For More Information On This Product,
Table D-43 GPT Interrupt Sources
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
10
10
0
0
0
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REGISTER SUMMARY
9
0
9
0
0
Input Capture 4/Output Compare 5
8
0
8
0
0
Pulse Accumulator Overflow
Pulse Accumulator Input
Output Compare 1
Output Compare 2
Output Compare 3
Output Compare 4
Adjusted Channel
Input Capture 1
Input Capture 2
Input Capture 3
Timer Overflow
7
0
7
0
Source
6
0
6
0
OC1D[5:1]
5
0
5
0
4
0
4
0
PORTGP
Vector Number
3
0
3
0
IVBA : 0000
IVBA : 0001
IVBA : 0010
IVBA : 0011
IVBA : 0100
IVBA : 0101
IVBA : 0110
IVBA : 0111
IVBA : 1000
IVBA : 1001
IVBA : 1010
IVBA : 1011
2
0
2
0
0
$YFF906
$YFF908
1
0
1
0
0
D-69
Ta-
0
0
0
0
0