MC9S12D64CPVE Freescale Semiconductor, MC9S12D64CPVE Datasheet - Page 97

• Manufacturer Part Number: MC9S12D64CPVE
• Description: IC MCU 64K FLASH 25MHZ 112LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12D64CPVE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.25 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12D
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68KIT912DP256
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (8-ch x 10-bit)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

A.2 ATD Characteristics
This section describes the characteristics of the analog to digital converter.
A.2.1 ATD Operating Characteristics
The Table A-8 shows conditions under which the ATD operates.
The following constraints exist to obtain full-scale, full range results:
V
beyond the power supply levels that it ties to. If the input level goes outside of this range it will effectively
be clipped.
A.2.2 Factors influencing accuracy
Three factors - source resistance, source capacitance and current injection - have an influence on the
accuracy of the ATD.
A.2.2.1 Source Resistance:
Due to the input pin leakage current as specified in Table A-6 in conjunction with the source resistance
there will be a voltage drop from the signal source to the ATD input. The maximum source resistance R
Conditions are shown in Table A-4 unless otherwise noted
Num C
NOTES:
1. Full accuracy is not guaranteed when differential voltage is less than 4.50V
2. The minimum time assumes a final sample period of 2 ATD clocks cycles while the maximum time assumes a final sample
SSA
1
2
3
4
5
6
7
8
period of 16 ATD clocks.
D
C Differential Reference Voltage
D ATD Clock Frequency
D
D
D Recovery Time (V
P Reference Supply current 2 ATD blocks on
P Reference Supply current 1 ATD block on
V
Reference Potential
ATD 10-Bit Conversion Period
ATD 8-Bit Conversion Period
RL
V
IN
Conv, Time at 2.0MHz ATD Clock f
Conv, Time at 2.0MHz ATD Clock f
V
RH
DDA
=5.0 Volts)
Rating
Table A-8 ATD Operating Characteristics
V
DDA
1
This constraint exists since the sample buffer amplifier can not drive
Clock Cycles
Clock Cycles
ATDCLK
ATDCLK
High
Low
2
2
N
V
T
Symbol
N
f
T
ATDCLK
CONV10
RH
CONV10
CONV8
CONV8
t
V
I
I
V
REC
REF
REF
RH
RL
-V
RL
MC9S12DJ64 Device User Guide — V01.20
V
V
4.50
DDA
Min
0.5
14
12
SSA
7
6
/2
5.00
Typ
V
0.750
0.375
V
Max
5.25
DDA
2.0
28
14
26
13
20
DDA
/2
Cycles
Cycles
MHz
Unit
mA
mA
V
V
V
s
s
s
97
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