C8051F130-GQR Silicon Laboratories Inc, C8051F130-GQR Datasheet - Page 332
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C8051F130-GQR
Manufacturer Part Number
C8051F130-GQR
Description
IC 8051 MCU 128K FLASH 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F13xr
Specifications of C8051F130-GQR
Core Processor
8051
Core Size
8-Bit
Speed
100MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
C8051F1x
Core
8051
Data Bus Width
8 bit
Data Ram Size
8.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
64
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F120DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F130-GQR
Manufacturer:
TI
Quantity:
679
Company:
Part Number:
C8051F130-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
24.2.4. Frequency Output Mode
Frequency Output Mode produces a programmable-frequency square wave on the module’s associated
CEXn pin. The capture/compare module high byte holds the number of PCA clocks to count before the out-
put is toggled. The frequency of the square wave is then defined by Equation 24.1.
Note: A value of 0x00 in the PCA0CPHn register is equal to 256 for this equation.
Where F
PCA0MD. The lower byte of the capture/compare module is compared to the PCA0 counter low byte; on a
match, CEXn is toggled and the offset held in the high byte is added to the matched value in PCA0CPLn.
Frequency Output Mode is enabled by setting the ECOMn, TOGn, and PWMn bits in the PCA0CPMn reg-
ister.
Important Note About Capture/Compare Registers : When writing a 16-bit value to the PCA0 Capture/
Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the ECOMn bit
to ‘0’; writing to PCA0CPHn sets ECOMn to ‘1’.
332
W
M
P
1
6
n
0
PCA0CPMn
E
C
O
M
n
C
A
P
P
n
0 0 0
C
A
P
N
n
M
A
PCA
T
n
O
G
T
n
1
W
M
P
n
is the frequency of the clock selected by the CPS2–0 bits in the PCA mode register,
E
C
C
F
n
0
PCA Timebase
Equation 24.1. Square Wave Frequency Output
Enable
Figure 24.7. PCA Frequency Output Mode
Comparator
PCA0CPLn
PCA0L
8-bit
F
sqr
=
---------------------------------------- -
2 PCA0CPHn
Rev. 1.4
match
Enable
Adder
8-bit Adder
F
PCA
Toggle
TOGn
0
1
CEXn
PCA0CPHn
Crossbar
Port I/O
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