DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 34

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

15.4 Operation in Asynchronous Mode ..................................................................................... 424
15.5 Multiprocessor Communication Function.......................................................................... 435
15.6 Operation in Clocked Synchronous Mode ......................................................................... 441
15.7 Smart Card Interface Description ...................................................................................... 449
15.8 Interrupt Sources................................................................................................................ 460
15.9 Usage Notes ....................................................................................................................... 462
Rev. 2.00 Sep. 28, 2009 Page xxxii of xl
REJ09B0452-0200
15.3.9 Bit Rate Register (BRR) ....................................................................................... 419
15.4.1 Data Transfer Format............................................................................................ 425
15.4.2 Receive Data Sampling Timing and Reception Margin in
15.4.3 Clock..................................................................................................................... 427
15.4.4 SCI Initialization (Asynchronous Mode).............................................................. 428
15.4.5 Serial Data Transmission (Asynchronous Mode) ................................................. 429
15.4.6 Serial Data Reception (Asynchronous Mode) ...................................................... 431
15.5.1 Multiprocessor Serial Data Transmission ............................................................. 437
15.5.2 Multiprocessor Serial Data Reception .................................................................. 438
15.6.1 Clock..................................................................................................................... 441
15.6.2 SCI Initialization (Clocked Synchronous Mode).................................................. 442
15.6.3 Serial Data Transmission (Clocked Synchronous Mode) ..................................... 443
15.6.4 Serial Data Reception (Clocked Synchronous Mode) .......................................... 445
15.6.5 Simultaneous Serial Data Transmission and Reception
15.7.1 Sample Connection ............................................................................................... 449
15.7.2 Data Format (Except in Block Transfer Mode) .................................................... 450
15.7.3 Block Transfer Mode ............................................................................................ 451
15.7.4 Receive Data Sampling Timing and Reception Margin ....................................... 452
15.7.5 Initialization.......................................................................................................... 453
15.7.6 Serial Data Transmission (Except in Block Transfer Mode) ................................ 453
15.7.7 Serial Data Reception (Except in Block Transfer Mode) ..................................... 456
15.7.8 Clock Output Control............................................................................................ 458
15.8.1 Interrupts in Normal Serial Communication Interface Mode ............................... 460
15.8.2 Interrupts in Smart Card Interface Mode .............................................................. 461
15.9.1 Module Stop Mode Setting ................................................................................... 462
15.9.2 Break Detection and Processing ........................................................................... 462
15.9.3 Mark State and Break Sending ............................................................................. 462
15.9.4 Receive Error Flags and Transmit Operations
15.9.5 Relation between Writing to TDR and TDRE Flag .............................................. 462
15.9.6 SCI Operations during Mode Transitions ............................................................. 463
15.9.7 Notes on Switching from SCK Pins to Port Pins .................................................. 466
Asynchronous Mode............................................................................................. 426
(Clocked Synchronous Mode) .............................................................................. 447
(Clocked Synchronous Mode Only) ..................................................................... 462