MCF5232CVM100J Freescale Semiconductor, MCF5232CVM100J Datasheet - Page 9
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MCF5232CVM100J
Manufacturer Part Number
MCF5232CVM100J
Description
IC MCU 64K SRAM 100MHZ 196MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF523xr
Datasheet
1.MCF5232CVM100J.pdf
(48 pages)
Specifications of MCF5232CVM100J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
100MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
DMA, WDT
Number Of I /o
97
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Processor Series
MCF523x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5234-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5232CVM100J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1
2
5
5.1
Freescale Semiconductor
Signal Name
PLL_TEST
Refers to pin’s primary function. All pins which are configurable for GPIO have a pullup enabled in GPIO mode with the exception
of PBUSCTL[7], PBUSCTL[4:0], PADDR, PBS, PSDRAM.
If JTAG_EN is asserted, these pins default to Alternate 1 (JTAG) functionality. The GPIO module is not responsible for assigning
these pins.
VDDPLL
VSSPLL
OVDD
TEST
•
•
•
VDD
VSS
Use a 4-layer printed circuit board with the VDD and GND pins connected directly to the power
and ground planes for the MCF523x.
See application note AN1259, System Design and Layout Techniques for Noise Reduction in
Processor-Based Systems.
Match the PC layout trace width and routing to match trace length to operating frequency and board
impedance. Add termination (series or therein) to the traces to dampen reflections. Increase the
PCB impedance (if possible) keeping the trace lengths balanced and short. Then do cross-talk
analysis to separate traces with significant parallelism or are otherwise "noisy". Use 6 mils trace
and separation. Clocks get extra separation and more precise balancing.
Design Recommendations
Layout
GPIO
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—
—
Table 2. MCF523x Signal Information and Muxing (continued)
MCF523x Integrated Microprocessor Hardware Specification, Rev. 4
Alternate 1 Alternate 2 Dir.
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Power Supplies
I
I
I
I
I
I
I
1
Test
95, 105, 114,
8, 16, 25, 31,
94, 104, 113,
1, 9, 17, 32,
15, 53, 103,
41, 55, 62,
69, 81, 90,
40, 54, 61,
67, 80, 88,
MCF5232
128, 132,
127, 131,
137, 145,
138, 146
153, 160
QFP
160
144
18
87
84
—
E10, F7, F9,
G6, G8, H7,
G7, G9, H6,
K7, P1, P14
J8, J10, K5,
H8, H9, J6,
E6, E9, F6,
J5, J7, J9,
MAPBGA
MCF5232
A1, A14,
D6, F11,
F8, F10,
E5, E7,
K6, K8
G4, L4
M13
196
L14
F5
E6:11, F5, F7:10, F12, G5, G6, G11,
G12, H5, H6, H11, H12, J5, J6, J11,
G7:10, H7: 10, J1, J7:10, K7:10, L6,
MAPBGA
MCF5233
J12, K5, K6, K11, K12, L5, L7:10,
A1, A16, E5, E12, F6, F11, F16,
L11, M5, M12, N16, T1, T6, T16
R14
256
J4
Design Recommendations
A8, G16, H1, T5
L12, M6:M11
MCF5234
MAPBGA
R14
P15
R15
256
J4
MAPBGA
MCF5235
R14
256
J4
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