HD64F3694FTV Renesas Electronics America, HD64F3694FTV Datasheet - Page 284

• Manufacturer Part Number: HD64F3694FTV
• Description: IC H8/3694F MCU FLASH 48-QFN
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3694FTV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: PWM, WDT
• Number Of I /o: 29
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 48-QFN
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 15 I
3. Read ICDRR every time RDRF is set. If 8th receive clock pulse falls while RDRF is 1, SCL is
4. The last byte data is read by reading ICDRR.
Rev.5.00 Nov. 02, 2005 Page 254 of 418
REJ09B0028-0500
(Master output)
(Master output)
(Slave output)
(Slave output)
(Master output)
(Master output)
fixed low until ICDRR is read. The change of the acknowledge before reading ICDRR, to be
returned to the master device, is reflected to the next transmit frame.
(Slave output)
(Slave output)
processing
processing
ICDRR
ICDRS
RDRF
ICDRR
ICDRS
SCL
SDA
SDA
RDRF
SCL
User
SCL
User
SDA
SCL
SDA
2
C Bus Interface 2 (IIC2)
Figure 15.11 Slave Receive Mode Operation Timing (1)
Figure 15.12 Slave Receive Mode Operation Timing (2)
[2] Read ICDRR (dummy read)
A
9
A
9
Bit 7
1
Bit 7
Bit 6
Data 1
1
Data 1
2
Bit 6
Bit 5
2
3
Bit 5
Bit 4
3
4
Bit 4
Bit 3
4
5
[3] Set ACKBT
Bit 3
Bit 2
5
6
Bit 2
Bit 1
6
7
[3] Read ICDRR [4] Read ICDRR
Bit 1
Bit 0
7
8
Bit 0
A
8
[2] Read ICDRR
A
9
9
Data 1
Bit 7
Data 1
Data 2
1
Data 2