C8051F010-GQ Silicon Laboratories Inc, C8051F010-GQ Datasheet - Page 67
![IC 8051 MCU 32K FLASH 64TQFP](/photos/12/39/123946/c8051f010-gq_sml.jpg)
C8051F010-GQ
Manufacturer Part Number
C8051F010-GQ
Description
IC 8051 MCU 32K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F01xr
Specifications of C8051F010-GQ
Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F005DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
12 bit, 2 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
336-1191
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F010-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
67
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
Mnemonic
ACALL addr11
LCALL addr16
RET
RETI
AJMP addr11
LJMP addr16
SJMP rel
JMP @A+DPTR
JZ rel
JNZ rel
CJNE A,direct,rel
CJNE A,#data,rel
CJNE Rn,#data,rel
CJNE @Ri,#data,rel
DJNZ Rn,rel
DJNZ direct,rel
NOP
Notes on Registers, Operands and Addressing Modes:
Rn - Register R0-R7 of the currently selected register bank.
@Ri - Data RAM location addressed indirectly through register R0-R1
rel - 8-bit, signed (two’s compliment) offset relative to the first byte of the following instruction. Used by SJMP
and all conditional jumps.
direct - 8-bit internal data location’s address. This could be a direct-access Data RAM location (0x00-0x7F) or an
SFR (0x80-0xFF).
#data - 8-bit constant
#data 16 - 16-bit constant
bit - Direct-addressed bit in Data RAM or SFR.
addr 11 - 11-bit destination address used by ACALL and AJMP. The destination must be within the same 2K-
byte page of program memory as the first byte of the following instruction.
addr 16 - 16-bit destination address used by LCALL and LJMP. The destination may be anywhere within the
64K-byte program memory space.
There is one unused opcode (0xA5) that performs the same function as NOP.
All mnemonics copyrighted © Intel Corporation 1980.
Description
Absolute subroutine call
Absolute jump
Jump indirect relative to DPTR
Compare immediate to A and jump if not equal
Compare immediate to register and jump if not
equal
Compare immediate to indirect and jump if not
equal
No operation
Long subroutine call
Return from subroutine
Return from interrupt
Long jump
Short jump (relative address)
Jump if A equals zero
Jump if A does not equal zero
Compare direct byte to A and jump if not equal
Decrement register and jump if not zero
Decrement direct byte and jump if not zero
Rev. 1.7
Bytes
2
3
1
1
2
3
2
1
2
2
3
3
3
3
2
3
1
Cycles
Clock
2/3
2/3
3/4
3/4
3/4
4/5
2/3
3/4
3
4
5
5
3
4
3
3
1