C8051F067-GQ Silicon Laboratories Inc, C8051F067-GQ Datasheet - Page 293

IC 8051 MCU 32K FLASH 64TQFP

C8051F067-GQ

Manufacturer Part Number
C8051F067-GQ
Description
IC 8051 MCU 32K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F06xr
Datasheets

Specifications of C8051F067-GQ

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
24
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F060DK
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit, 1 Channel
On-chip Dac
12 bit, 2 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
336-1222

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Bits7-5:
Bit4:
Bit3:
Bit2:
Bits1-0:
†Note:
R/W
Bit7
-
UNUSED. Read = 000b, Write = don’t care.
T1M: Timer 1 Clock Select.
This select the clock source supplied to Timer 1. T1M is ignored when C/T1 is set to logic 1.
0: Timer 1 uses the clock defined by the prescale bits, SCA1-SCA0.
1: Timer 1 uses the system clock.
T0M: Timer 0 Clock Select.
This bit selects the clock source supplied to Timer 0. T0M is ignored when C/T0 is set to
logic 1.
0: Counter/Timer 0 uses the clock defined by the prescale bits, SCA1-SCA0.
1: Counter/Timer 0 uses the system clock.
UNUSED. Read = 0b, Write = don’t care.
SCA1-SCA0: Timer 0/1 Prescale Bits
These bits control the division of the clock supplied to Timer 0 and/or Timer 1 if configured
to use prescaled clock inputs.
External clock divided by 8 is synchronized with the system clock, and external clock must
be less than or equal to the system clock frequency to operate the timer in this mode.
SCA1
0
0
1
1
R/W
Bit6
-
SCA0
0
1
0
1
R/W
Bit5
Figure 24.6. CKCON: Clock Control Register
-
External clock divided by 8†
System clock divided by 12
System clock divided by 48
System clock divided by 4
T1M
R/W
Bit4
Prescaled Clock
Rev. 1.2
T0M
R/W
Bit3
C8051F060/1/2/3/4/5/6/7
R/W
Bit2
-
SCA1
R/W
Bit1
SFR Address:
SFR Page:
SCA0
R/W
Bit0
0x8E
0
Reset Value
00000000
293

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