MCF5274LVM166J Freescale Semiconductor, MCF5274LVM166J Datasheet - Page 33
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MCF5274LVM166J
Manufacturer Part Number
MCF5274LVM166J
Description
IC MCU 166MHZ 196MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheet
1.MCF5274LVM166J.pdf
(44 pages)
Specifications of MCF5274LVM166J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
166MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
61
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
196-MAPBGA
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5274LVM166J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
8.10
Freescale Semiconductor
RESET and Configuration Override Timing
1
2
NUM
R1
R2
R3
R4
R5
R6
R7
R8
All AC timing is shown with respect to 50% OV
During low power STOP, the synchronizers for the RESET input are bypassed and RESET is asserted
asynchronously to the system. Thus, RESET must be held a minimum of 100 ns.
Configuration Overrides
1. Refer to the Coldfire Integration Module (CIM) section for more information.
(RCON, Override pins])
Reset and Configuration Override Timing
RESET Input valid to CLKOUT High
CLKOUT High to RESET Input invalid
RESET Input valid Time
CLKOUT High to RSTOUT Valid
RSTOUT valid to Config. Overrides valid
Configuration Override Setup Time to RSTOUT invalid
Configuration Override Hold Time after RSTOUT invalid
RSTOUT invalid to Configuration Override High Impedance
RSTOUT
CLKOUT
RESET
MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 4
GPIO Outputs
GPIO Inputs
1
CLKOUT
:
Table 17. Reset and Configuration Override Timing
Characteristic
(V
2
R1
DD
= 2.7 to 3.6 V, V
G3
Figure 15. GPIO Timing
DD
R3
levels unless otherwise noted.
G1
G4
SS
= 0 V, T
R2
A
G2
= T
R4
Symbol
t
t
t
CHROV
t
ROVCV
L
t
ROICZ
t
t
RVCH
t
CHRI
RIVT
COH
COS
to T
R5
H
)
1
Min
1.5
20
—
—
9
5
0
0
R6
Electrical Characteristics
1 x t
R4
Max
10
—
—
—
—
—
—
CYC
R7
R8
Unit
t
t
CYC
CYC
ns
ns
ns
ns
ns
ns
33