MC68HC908LK24CFU Freescale Semiconductor, MC68HC908LK24CFU Datasheet - Page 97
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MC68HC908LK24CFU
Manufacturer Part Number
MC68HC908LK24CFU
Description
IC MCU 24K FLASH 8MHZ SPI 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908LK24CFUE.pdf
(464 pages)
Specifications of MC68HC908LK24CFU
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
40
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC908LK24CFU
Manufacturer:
FREESCALE Semiconductor
Quantity:
489
Company:
Part Number:
MC68HC908LK24CFU
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
CMP #opr
CMP opr
CMP opr
CMP opr,X
CMP opr,X
CMP ,X
CMP opr,SP
CMP opr,SP
COM opr
COMA
COMX
COM opr,X
COM ,X
COM opr,SP
CPHX #opr
CPHX opr
CPX #opr
CPX opr
CPX opr
CPX ,X
CPX opr,X
CPX opr,X
CPX opr,SP
CPX opr,SP
DAA
DBNZ opr,rel
DBNZA rel
DBNZX rel
DBNZ opr,X,rel
DBNZ X,rel
DBNZ opr,SP,rel
DEC opr
DECA
DECX
DEC opr,X
DEC ,X
DEC opr,SP
DIV
EOR #opr
EOR opr
EOR opr
EOR opr,X
EOR opr,X
EOR ,X
EOR opr,SP
EOR opr,SP
Source
Form
Compare A with M
Complement (One’s Complement)
Compare H:X with M
Compare X with M
Decimal Adjust A
Decrement and Branch if Not Zero
Decrement
Divide
Exclusive OR M with A
Operation
Table 6-1. Instruction Set Summary (Sheet 4 of 8)
Central Processor Unit (CPU)
A ← (A) – 1 or M ← (M) – 1 or X ← (X) – 1
PC ← (PC) + 3 + rel ? (result) ≠ 0
PC ← (PC) + 2 + rel ? (result) ≠ 0
PC ← (PC) + 2 + rel ? (result) ≠ 0
PC ← (PC) + 3 + rel ? (result) ≠ 0
PC ← (PC) + 2 + rel ? (result) ≠ 0
PC ← (PC) + 4 + rel ? (result) ≠ 0
M ← (M) = $FF – (M)
M ← (M) = $FF – (M)
M ← (M) = $FF – (M)
M ← (M) = $FF – (M)
A ← (A) = $FF – (M)
X ← (X) = $FF – (M)
(H:X) – (M:M + 1)
H ← Remainder
A ← (H:A)/(X)
A ← (A ⊕ M)
Description
M ← (M) – 1
M ← (M) – 1
M ← (M) – 1
M ← (M) – 1
A ← (A) – 1
X ← (X) – 1
(A) – (M)
(X) – (M)
(A)
10
U – –
V H I N Z C
0 – –
– – – – – –
– – – –
0 – –
– –
– –
– –
– –
Effect on
CCR
Central Processor Unit (CPU)
1
–
–
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
DIR
INH
INH
IX1
IX
SP1
IMM
DIR
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
INH
DIR
INH
INH
IX1
IX
SP1
DIR
INH
INH
IX1
IX
SP1
INH
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
9EE1
9ED1
9EE3
9ED3
9E6B
9E6A
9EE8
9ED8
9E63
C1
D1
C3
D3
C8
D8
A1
B1
E1
F1
33
43
53
63
73
65
75
A3
B3
E3
F3
72
3B
4B
5B
6B
7B
3A
4A
5A
6A
7A
52
A8
B8
E8
F8
Opcode Map
Data Sheet
ii
dd
hh ll
ee ff
ff
ff
ee ff
dd
ff
ff
ii ii+1
dd
ii
dd
hh ll
ee ff
ff
ff
ee ff
dd rr
rr
rr
ff rr
rr
ff rr
dd
ff
ff
ii
dd
hh ll
ee ff
ff
ff
ee ff
97
2
3
4
4
3
2
4
5
4
1
1
4
3
5
3
4
2
3
4
4
3
2
4
5
2
5
3
3
5
4
6
4
1
1
4
3
5
7
2
3
4
4
3
2
4
5
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