MC68HC908LK24CFU Freescale Semiconductor, MC68HC908LK24CFU Datasheet - Page 82
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MC68HC908LK24CFU
Manufacturer Part Number
MC68HC908LK24CFU
Description
IC MCU 24K FLASH 8MHZ SPI 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908LK24CFUE.pdf
(464 pages)
Specifications of MC68HC908LK24CFU
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
40
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC908LK24CFU
Manufacturer:
FREESCALE Semiconductor
Quantity:
489
Company:
Part Number:
MC68HC908LK24CFU
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Configuration Registers (CONFIG)
5.5 Configuration Register 2 (CONFIG2)
Data Sheet
82
NOTE:
NOTE:
†† Reset by POR only.
Address:
SSREC — Short Stop Recovery
Exiting stop mode by pulling reset will result in the long stop recovery.
If using an external crystal oscillator, do not set the SSREC bit.
When the LVISTOP is enabled, the system stabilization time for power
on reset and long stop recovery (both 4096 ICLK cycles) gives a delay
longer than the enable time for the LVI. There is no period where the
MCU is not protected from a low power condition. However, when using
the short stop recovery configuration option, the 32 ICLK delay is less
than the LVI’s turn-on time and there exists a period in start-up where the
LVI is not protecting the MCU.
STOP — STOP Instruction Enable
COPD — COP Disable Bit
The CONFIG2 register can be written once after each reset.
Reset:
Read:
Write:
SSREC enables the CPU to exit stop mode with a delay of 32 ICLK
cycles instead of a 4096 ICLK cycle delay.
STOP enables the STOP instruction.
COPD disables the COP module. (See
Operating Properly
1 = Stop mode recovery after 32 ICLK cycles
0 = Stop mode recovery after 4096 ICLK cycles
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
$001D
Bit 7
PEE
Figure 5-3. Configuration Register 2 (CONFIG2)
Configuration Registers (CONFIG)
0
IRCDIS
STOP_
6
0
XCLKEN
(COP).)
STOP_
5
0
DIV2CLK
4
0
PCEH
MC68HC908LJ24/LK24 — Rev. 2.1
Section 21. Computer
3
0
PCEL
Freescale Semiconductor
2
0
LVISEL1
0
1
††
LVISEL0
Bit 0
1
††
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