MC9S12XEQ512CAL Freescale Semiconductor, MC9S12XEQ512CAL Datasheet - Page 114

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MC9S12XEQ512CAL

Manufacturer Part Number
MC9S12XEQ512CAL
Description
MCU 16BIT 512K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEQ512CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
32KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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1. Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other modes the data source
Chapter 2 Port Integration Module (S12XEPIMV1)
2.3.7
114
Function
Address 0x0004 (PRR)
is depending on the data direction value.
Write: Anytime. In emulation modes, write operations will also be directed to the external bus.
DDRB
Altern.
Field
Field
Reset
7-0
7-0
PC
W
R
Port B Data Direction—
This register controls the data direction of pins 7 through 0.
The external bus function forces the I/O state to be outputs for all associated pins. In this case the data direction bits
will not change.
When operating a pin as a general purpose I/O, the associated data direction bit determines whether it is an input
or output.
1 Associated pin is configured as output.
0 Associated pin is configured as high-impedance input.
Port C general purpose input/output data—Data Register
Port C pins 7 through 0 are associated with data I/O lines DATA[15:8] respectively in expanded modes.
When not used with the alternative function, these pins can be used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.
DATA15
Port C Data Register (PORTC)
PC7
0
7
DATA14
PC6
0
6
Table 2-8. PORTC Register Field Descriptions
Table 2-7. DDRB Register Field Descriptions
MC9S12XE-Family Reference Manual , Rev. 1.23
Figure 2-5. Port C Data Register (PORTC)
DATA13
PC5
0
5
DATA12
PC4
0
4
Description
Description
DATA11
PC3
3
0
DATA10
PC2
0
2
Access: User read/write
Freescale Semiconductor
DATA9
PC1
0
1
DATA8
PC0
0
0
(1)

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