MC908AP32ACFBE Freescale Semiconductor, MC908AP32ACFBE Datasheet - Page 183
![IC MCU 32K FLASH 8MHZ 44-QFP](/photos/39/61/396111/4243290_sml.jpg)
MC908AP32ACFBE
Manufacturer Part Number
MC908AP32ACFBE
Description
IC MCU 32K FLASH 8MHZ 44-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908AP16ACFBER.pdf
(316 pages)
Specifications of MC908AP32ACFBE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
Controller Family/series
HC08
No. Of I/o's
32
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08AP
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908AP64E, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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Manufacturer
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12.5.2.2 Character Transmission
During an SCI transmission, the transmit shift register shifts a character out to the TxD pin. The IRSCI
data register (IRSCDR) is the write-only buffer between the internal data bus and the transmit shift
register. To initiate an SCI transmission:
At the start of a transmission, transmitter control logic automatically loads the transmit shift register with
a preamble of logic 1s. After the preamble shifts out, control logic transfers the IRSCDR data into the
transmit shift register. A logic 0 start bit automatically goes into the least significant bit position of the
transmit shift register. A logic 1 stop bit goes into the most significant bit position.
Freescale Semiconductor
BUS CLOCK
CGMXCLK
1. Enable the SCI by writing a logic 1 to the enable SCI bit (ENSCI) in IRSCI control register 1
2. Enable the transmitter by writing a logic 1 to the transmitter enable bit (TE) in IRSCI control register
3. Clear the SCI transmitter empty bit by first reading IRSCI status register 1 (IRSCS1) and then
4. Repeat step 3 for each subsequent transmission.
(IRSCC1).
2 (IRSCC2).
writing to the IRSCDR.
SL = 0 => X = A
SL = 1 => X = B
A
B
CKS
SL
X
SCP1
SCP0
SCR1
SCR2
SCR0
SCALER
PRE-
MC68HC908AP A-Family Data Sheet, Rev. 3
DIVIDER
BAUD
Figure 12-7. SCI Transmitter
PEN
PTY
÷ 16
GENERATION
PARITY
DMATE
DMATE
SCTIE
SCTE
DMATE
SCTE
SCTIE
TC
TCIE
T8
M
H
8
SCTIE
7
SCTE
TCIE
TC
SCI DATA REGISTER
6
SHIFT REGISTER
INTERNAL BUS
TRANSMIT
5
11-BIT
4
CONTROL LOGIC
TRANSMITTER
3
2
1
SCI Functional Description
LOOPS
ENSCI
SBK
TE
0
L
SCI_TxD
183
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