MC9S08GT60ACFBE Freescale Semiconductor, MC9S08GT60ACFBE Datasheet - Page 110

IC MCU 60K FLASH 4K RAM 44-QFP

MC9S08GT60ACFBE

Manufacturer Part Number
MC9S08GT60ACFBE
Description
IC MCU 60K FLASH 4K RAM 44-QFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08GT60ACFBE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
36
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8/2.08V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PQFP
Processor Series
S08GT
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
4 KB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
39
Number Of Timers
2
Operating Supply Voltage
0 V to 1.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
M68EVB908GB60E, M68DEMO908GB60E
Minimum Operating Temperature
- 40 C
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Internal Clock Generator (S08ICGV2)
In this state, the FLL loop is open. The DCO is on, and the output clock signal ICGOUT frequency is given
by f
into the filter registers (ICGFLTU and ICGFLTL). This is the only mode in which the filter registers can
be written.
If this mode is entered due to a reset, f
mode is entered from FLL engaged internal, f
is entered from FLL engaged external (either by programming CLKS or due to a loss of external reference
clock), f
If this mode is entered from off mode, f
entering off mode. If CLKS bits are set to 01 or 11 coming out of the Off state, the ICG enters this mode
until ICGDCLK is stable as determined by the DCOS bit. Once ICGDCLK is considered stable, the ICG
automatically closes the loop by switching to FLL engaged (internal or external) as selected by the CLKS
bits.
110
ICGDCLK
ICGDCLK
/ R. The ICGDCLK frequency can be varied from 8 MHz to 40 MHz by writing a new value
DCOS
COUNTER ENABLE
will maintain the previous frequency, but ICGOUT will double if the FLL was unlocked.
CLKST
SUBTRACTOR
REFERENCE
DIVIDER (/7)
RANGE
Figure 7-6. Detailed Frequency-Locked Loop Block Diagram
LOCK
MFD
RANGE
OVERFLOW
LOSS OF CLOCK
LOLS
DETECTOR
LOCK AND
LOCS
MC9S08GB60A Data Sheet, Rev. 2
ICGDCLK
ICGIRCLK
ICGDCLK
ERCS
DIGITAL
FILTER
CLKST
LOOP
FLT
ICGDCLK
will default to f
LOCD
will be equal to the frequency of ICGDCLK before
COUNTER
PULSE
will maintain the previous frequency. If this mode
CONTROLLED
ICGIF
OSCILLATOR
FLL ANALOG
DIGITALLY
Self_reset
INTERRUPT
RESET AND
CIRCUIT
SELECT
CLOCK
CONTROL
CLKS
LOLRE LOCRE
ICGDCLK
ICG2DCLK
1x
2x
which is nominally 8 MHz. If this
FREQUENCY
DIVIDER (R)
REDUCED
RFD
Freescale Semiconductor
FREQUENCY-
LOOP (FLL)
LOCKED
ICGOUT
RESET
IRQ

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