MC9S12XEG128MAA Freescale Semiconductor, MC9S12XEG128MAA Datasheet - Page 957

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MC9S12XEG128MAA

Manufacturer Part Number
MC9S12XEG128MAA
Description
MCU 16BIT 128K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEG128MAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 12x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
59
Number Of Timers
25
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
No. Of I/o's
59
Eeprom Memory Size
2KB
Ram Memory Size
12KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
QFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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EEE (Emulated EEPROM) — A method to emulate the small sector size features and endurance
characteristics associated with an EEPROM.
EEE IFR — Nonvolatile information register located in the D-Flash block that contains data required to
partition the D-Flash memory and buffer RAM for EEE. The EEE IFR is visible in the global memory map
by setting the EEEIFRON bit in the MMCCTL1 register.
NVM Command Mode — An NVM mode using the CPU to setup the FCCOB register to pass parameters
required for Flash command execution.
Phrase — An aligned group of four 16-bit words within the P-Flash memory. Each phrase includes eight
ECC bits for single bit fault correction and double bit fault detection within the phrase.
P-Flash Memory — The P-Flash memory constitutes the main nonvolatile memory store for applications.
P-Flash Sector — The P-Flash sector is the smallest portion of the P-Flash memory that can be erased.
Each P-Flash sector contains 1024 bytes.
Program IFR — Nonvolatile information register located in the P-Flash block that contains the Device
ID, Version ID, and the Program Once field. The Program IFR is visible in the global memory map by
setting the PGMIFRON bit in the MMCCTL1 register.
26.1.2
26.1.2.1
26.1.2.2
Freescale Semiconductor
384 Kbytes of P-Flash memory composed of one 256 Kbyte Flash block and one 128 Kbyte Flash
block. The 256 Kbyte Flash block consists of two 128 Kbyte sections each divided into 128 sectors
of 1024 bytes. The 128 Kbyte Flash block is divided into 128 sectors of 1024 bytes.
Single bit fault correction and double bit fault detection within a 64-bit phrase during read
operations
Automated program and erase algorithm with verify and generation of ECC parity bits
Fast sector erase and phrase program operation
Ability to program up to one phrase in each P-Flash block simultaneously
Flexible protection scheme to prevent accidental program or erase of P-Flash memory
Up to 32 Kbytes of D-Flash memory with 256 byte sectors for user access
Dedicated commands to control access to the D-Flash memory over EEE operation
Single bit fault correction and double bit fault detection within a word during read operations
Automated program and erase algorithm with verify and generation of ECC parity bits
Fast sector erase and word program operation
Ability to program up to four words in a burst sequence
Features
P-Flash Features
D-Flash Features
MC9S12XE-Family Reference Manual , Rev. 1.23
Chapter 26 384 KByte Flash Module (S12XFTM384K2V1)
957

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