MC9S12XEG128MAA Freescale Semiconductor, MC9S12XEG128MAA Datasheet - Page 75

• Manufacturer Part Number: MC9S12XEG128MAA
• Description: MCU 16BIT 128K FLASH 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XEG128MAA

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 12x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-QFP
• Processor Series: S12XE
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 25
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 12-bit
• No. Of I/o's: 59
• Eeprom Memory Size: 2KB
• Ram Memory Size: 12KB
• Cpu Speed: 50MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 8
• Digital Ic Case Style: QFP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.3
The clock and reset generator module (CRG) provides the internal clock signals for the core and all
peripheral modules.
Consult the CRG specification for details on clock generation.
The system clock can be supplied in several ways enabling a range of system operating frequencies to be
supported:
The clock generated by the PLL or oscillator provides the main system clock frequencies core clock and
bus clock. As shown in
the memories, and the peripherals.
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
•
•
•
EXTAL
XTAL
The on-chip phase locked loop (PLL)
the PLL self clocking
the oscillator
System Clock Description
SCI0 . . SCI 7
Bus Clock
RAM
CRG
Figure 1-9
Figure
SPI0 . . SPI2
1-9, these system clocks are used throughout the MCU to drive the core,
shows the clock connections from the CRG to all modules.
MC9S12XE-Family Reference Manual Rev. 1.23
S12X
Figure 1-9. Clock Connections
Core Clock
CAN0 . . CAN4
XGATE
Oscillator Clock
IIC0 & IIC1
FLASH &
Chapter 1 Device Overview MC9S12XE-Family
EEE
ATD0 & ATD1
PIT
ECT
PIM
PWM
TIM
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