MC9S12XEG128MAA Freescale Semiconductor, MC9S12XEG128MAA Datasheet - Page 121

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MC9S12XEG128MAA

Manufacturer Part Number
MC9S12XEG128MAA
Description
MCU 16BIT 128K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEG128MAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 12x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
59
Number Of Timers
25
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
No. Of I/o's
59
Eeprom Memory Size
2KB
Ram Memory Size
12KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
QFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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1. Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other modes the data source
2. Reset values in emulation modes are identical to those of the target mode.
Reset
2.3.15
Freescale Semiconductor
Address 0x001C (PRR)
is depending on the data direction value.
Write: Anytime. In emulation modes, write operations will also be directed to the external bus.
RDPB
RDPA
Field
SS
ES
EX
NS
NX
ST
1
0
(2)
W
R
:
Port B reduced drive—Select reduced drive for outputs
This bit configures the drive strength of all output pins as either full or reduced independent of the function used on
the pins. If a pin is used as input this bit has no effect.
1 Reduced drive selected (approx. 1/5 of the full drive strength).
0 Full drive strength enabled.
Port A reduced drive—Select reduced drive for outputs
This bit configures the drive strength of all output pins as either full or reduced independent of the function used on
the pins. If a pin is used as input this bit has no effect.
1 Reduced drive selected (approx. 1/5 of the full drive strength).
0 Full drive strength enabled.
NECLK
Depen-
Mode
ECLK Control Register (ECLKCTL)
dent
0
1
0
0
1
0
7
= Unimplemented or Reserved
NCLKX2
Table 2-15. RDRIV Register Field Descriptions (continued)
1
1
1
1
1
1
1
6
Figure 2-13. ECLK Control Register (ECLKCTL)
MC9S12XE-Family Reference Manual , Rev. 1.23
DIV16
0
0
0
0
0
0
0
5
EDIV4
0
0
0
0
0
0
0
4
Description
EDIV3
3
0
0
0
0
0
0
0
Chapter 2 Port Integration Module (S12XEPIMV1)
EDIV2
0
0
0
0
0
0
0
2
Access: User read/write
EDIV1
0
0
0
0
0
0
0
1
EDIV0
0
0
0
0
0
0
0
0
121
(1)

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