MC908GZ32VFAER Freescale Semiconductor, MC908GZ32VFAER Datasheet - Page 291
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MC908GZ32VFAER
Manufacturer Part Number
MC908GZ32VFAER
Description
IC MCU 8BIT 32K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GZ60CFJE.pdf
(352 pages)
Specifications of MC908GZ32VFAER
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908GZ32VFAER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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19.8.1 TIM2 Status and Control Register
The TIM2 status and control register:
TOF — TIM2 Overflow Flag Bit
TOIE — TIM2 Overflow Interrupt Enable Bit
TSTOP — TIM2 Stop Bit
TRST — TIM2 Reset Bit
Freescale Semiconductor
•
•
•
•
•
This read/write flag is set when the TIM2 counter resets reaches the modulo value programmed in the
TIM2 counter modulo registers. Clear TOF by reading the TIM2 status and control register when TOF
is set and then writing a 0 to TOF. If another TIM2 overflow occurs before the clearing sequence is
complete, then writing 0 to TOF has no effect. Therefore, a TOF interrupt request cannot be lost due
to inadvertent clearing of TOF. Reset clears the TOF bit. Writing a 1 to TOF has no effect.
This read/write bit enables TIM2 overflow interrupts when the TOF bit becomes set. Reset clears the
TOIE bit.
This read/write bit stops the TIM2 counter. Counting resumes when TSTOP is cleared. Reset sets the
TSTOP bit, stopping the TIM2 counter until software clears the TSTOP bit.
Setting this write-only bit resets the TIM2 counter and the TIM2 prescaler. Setting TRST has no effect
on any other registers. Counting resumes from $0000. TRST is cleared automatically after the TIM2
counter is reset and always reads as 0. Reset clears the TRST bit.
1 = TIM2 counter has reached modulo value
0 = TIM2 counter has not reached modulo value
1 = TIM2 overflow interrupts enabled
0 = TIM2 overflow interrupts disabled
1 = TIM2 counter stopped
0 = TIM2 counter active
1 = Prescaler and TIM2 counter cleared
0 = No effect
Enables TIM2 overflow interrupts
Flags TIM2 overflows
Stops the TIM2 counter
Resets the TIM2 counter
Prescales the TIM2 counter clock
Address:
Do not set the TSTOP bit before entering wait mode if the TIM2 is required
to exit wait mode. Also when the TSTOP bit is set and the timer is
configured for input capture operation, input captures are inhibited until the
TSTOP bit is cleared.
Reset:
Read:
Write:
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
$002B
Figure 19-5. TIM2 Status and Control Register (T2SC)
Bit 7
TOF
0
0
= Unimplemented
TOIE
6
0
TSTOP
5
1
NOTE
TRST
4
0
0
3
0
0
PS2
2
0
PS1
1
0
Bit 0
PS0
0
I/O Registers
291
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