MC908GZ32VFAER Freescale Semiconductor, MC908GZ32VFAER Datasheet - Page 162
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MC908GZ32VFAER
Manufacturer Part Number
MC908GZ32VFAER
Description
IC MCU 8BIT 32K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GZ60CFJE.pdf
(352 pages)
Specifications of MC908GZ32VFAER
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908GZ32VFAER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
- Current page: 162 of 352
- Download datasheet (5Mb)
MSCAN08 Controller (MSCAN08)
12.13.6 MSCAN08 Receiver Interrupt Enable Register
WUPIE — Wakeup Interrupt Enable
RWRNIE — Receiver Warning Interrupt Enable
TWRNIE — Transmitter Warning Interrupt Enable
RERRIE — Receiver Error Passive Interrupt Enable
TERRIE — Transmitter Error Passive Interrupt Enable
BOFFIE — Bus-Off Interrupt Enable
OVRIE — Overrun Interrupt Enable
RXFIE — Receiver Full Interrupt Enable
162
1 = A wakeup event will result in a wakeup interrupt.
0 = No interrupt will be generated from this event.
1 = A receiver warning status event will result in an error interrupt.
0 = No interrupt is generated from this event.
1 = A transmitter warning status event will result in an error interrupt.
0 = No interrupt is generated from this event.
1 = A receiver error passive status event will result in an error interrupt.
0 = No interrupt is generated from this event.
1 = A transmitter error passive status event will result in an error interrupt.
0 = No interrupt is generated from this event.
1 = A bus-off event will result in an error interrupt.
0 = No interrupt is generated from this event.
1 = An overrun event will result in an error interrupt.
0 = No interrupt is generated from this event.
1 = A receive buffer full (successful message reception) event will result in a receive interrupt.
0 = No interrupt will be generated from this event.
Address:
The CRIER register is held in the reset state when the SFTRES bit in
CMCR0 is set.
Reset:
Read:
Write:
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Figure 12-21. Receiver Interrupt Enable Register (CRIER)
WUPIE
$0505
Bit 7
0
RWRNIE
6
0
TWRNIE
5
0
NOTE
RERRIE
4
0
TERRIE
3
0
BOFFIE
2
0
OVRIE
1
0
Freescale Semiconductor
RXFIE
Bit 0
0
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