MC908GR16AVFAER Freescale Semiconductor, MC908GR16AVFAER Datasheet - Page 63
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MC908GR16AVFAER
Manufacturer Part Number
MC908GR16AVFAER
Description
IC MCU 8BIT 16K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GR16ACFAE.pdf
(270 pages)
Specifications of MC908GR16AVFAER
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
ESCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
37
Number Of Timers
4
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908GR16AVFAER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Table 4-3
4.3.7 Special Programming Exceptions
The programming method described in
exceptions. A value of 0 for N or L is meaningless when used in the equations given. To account for these
exceptions:
See
4.3.8 Base Clock Selector Circuit
This circuit is used to select either the crystal clock, CGMXCLK, or the VCO clock, CGMVCLK, as the
source of the base clock, CGMOUT. The two input clocks go through a transition control circuit that waits
up to three CGMXCLK cycles and three CGMVCLK cycles to change from one clock source to the other.
During this time, CGMOUT is held in stasis. The output of the transition control circuit is then divided by
two to correct the duty cycle. Therefore, the bus clock frequency, which is one-half of the base clock
frequency, is one-fourth the frequency of the selected clock (CGMXCLK or CGMVCLK).
The BCS bit in the PLL control register (PCTL) selects which clock drives CGMOUT. The VCO clock
cannot be selected as the base clock source if the PLL is not turned on. The PLL cannot be turned off if
the VCO clock is selected. The PLL cannot be turned on or off simultaneously with the selection or
deselection of the VCO clock. The VCO clock also cannot be selected as the base clock source if the
factor L is programmed to a 0. This value would set up a condition inconsistent with the operation of the
PLL, so that the PLL would be disabled and the crystal clock would be forced as the source of the base
clock.
Freescale Semiconductor
•
•
4.3.8 Base Clock Selector
A 0 value for N is interpreted exactly the same as a value of 1.
A 0 value for L disables the PLL and prevents its selection as the source for the base clock.
provides numeric examples (register values are in hexadecimal notation):
f
BUS
2.4576
4.9152
7.3728
1.0
2.0
4.0
8.0
2.0
4.0
5.0
8.0
2.0
4.0
6.0
8.0
(MHz)
Circuit.
MC68HC908GR16A Data Sheet, Rev. 1.0
Table 4-3. Numeric Example
f
RCLK
4.3.6 Programming the PLL
4.9152
4.9152
4.9152
2.0
2.0
2.0
2.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
(MHz)
PCTL
E
0
0
1
2
0
1
2
2
1
2
2
0
1
2
2
PMSH,L
002
004
008
010
002
004
005
008
002
004
006
001
002
003
004
N
does not account for two possible
PMRS
38
70
70
70
70
70
46
70
45
45
67
70
70
54
70
L
Functional Description
63
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