MC9S12P96CFT Freescale Semiconductor, MC9S12P96CFT Datasheet - Page 63
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MC9S12P96CFT
Manufacturer Part Number
MC9S12P96CFT
Description
MCU 16BIT 96K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of MC9S12P96CFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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1. Read: Anytime. The data source is depending on the data direction value.
1. Read: Anytime. The data source is depending on the data direction value.
2.3.3
2.3.4
Freescale Semiconductor
Address 0x0000
Address 0x0001
Write: Anytime
Write: Anytime
Field
Field
Reset
Reset
7-0
7-0
PB
PA
W
W
R
R
Port A general purpose input/output data—Data Register
The associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is
driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port B general purpose input/output data—Data Register
The associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is
driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port A Data Register (PORTA)
Port B Data Register (PORTB)
PB7
PA7
0
0
7
7
PB6
PA6
0
0
6
6
Table 2-5. PORTB Register Field Descriptions
Table 2-4. PORTA Register Field Descriptions
Figure 2-2. Port B Data Register (PORTB)
Figure 2-1. Port A Data Register (PORTA)
S12P-Family Reference Manual, Rev. 1.13
PB5
PA5
5
0
5
0
PB4
PA4
0
0
4
4
Description
Description
PB3
PA3
0
0
3
3
PB2
PA2
0
0
2
2
Port Integration Module (S12PPIMV1)
Access: User read/write
Access: User read/write
PA1
PB1
0
0
1
1
PA0
PB0
0
0
0
0
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