C8051F221-GQR Silicon Laboratories Inc, C8051F221-GQR Datasheet - Page 131

• Manufacturer Part Number: C8051F221-GQR
• Description: IC 8051 MCU 8K FLASH 32LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F2xxr

Specifications of C8051F221-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 22
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 22x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: C8051F2x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F226DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 32 Channel
• For Use With: 336-1241 - DEV KIT F220/221/226/230/231/236
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Bits7–6: UNUSED. Read = 00b, Write = don't care.
Bit5:
Bit4:
Bit3:
Bits2–0: UNUSED. Read = 000b, Write = don't care.
R/W
Bit7
-
T2M: Timer 2 Clock Select.
This bit controls the division of the system clock supplied to Timer 2. This bit is ignored
when the timer is in baud rate generator mode or counter mode (i.e. C/T2 = 1).
0: Timer 2 uses the system clock divided by 12.
1: Timer 2 uses the system clock.
T1M: Timer 1 Clock Select.
This bit controls the division of the system clock supplied to Timer 1.
0: Timer 1 uses the system clock divided by 12.
1: Timer 1 uses the system clock.
T0M: Timer 0 Clock Select.
This bit controls the division of the system clock supplied to Counter/Timer 0.
0: Counter/Timer uses the system clock divided by 12.
1: Counter/Timer uses the system clock.
R/W
Bit6
-
SFR Definition 17.3. CKCON: Clock Control
T2M
R/W
Bit5
T1M
R/W
Bit4
Rev. 1.6
T0M
R/W
Bit3
R/W
Bit2
-
R/W
Bit1
-
C8051F2xx
R/W
Bit0
-
SFR Address:
Reset Value
00000000
0x8E
131