MCR908JL3ECFAE Freescale Semiconductor, MCR908JL3ECFAE Datasheet - Page 91
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MCR908JL3ECFAE
Manufacturer Part Number
MCR908JL3ECFAE
Description
IC MCU 4K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908JK1ECDWE.pdf
(180 pages)
Specifications of MCR908JL3ECFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LED, LVD, POR, PWM
Number Of I /o
23
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 12x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCR908JL3ECFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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8.9.2 TIM Counter Registers (TCNTH:TCNTL)
The two read-only TIM counter registers contain the high and low bytes of the value in the TIM counter.
Reading the high byte (TCNTH) latches the contents of the low byte (TCNTL) into a buffer. Subsequent
reads of TCNTH do not affect the latched TCNTL value until TCNTL is read. Reset clears the TIM counter
registers. Setting the TIM reset bit (TRST) also clears the TIM counter registers.
8.9.3 TIM Counter Modulo Registers (TMODH:TMODL)
The read/write TIM modulo registers contain the modulo value for the TIM counter. When the TIM counter
reaches the modulo value, the overflow flag (TOF) becomes set, and the TIM counter resumes counting
from $0000 at the next timer clock. Writing to the high byte (TMODH) inhibits the TOF bit and overflow
interrupts until the low byte (TMODL) is written. Reset sets the TIM counter modulo registers.
Freescale Semiconductor
Address:
Address:
Address:
Address:
If you read TCNTH during a break interrupt, be sure to unlatch TCNTL by
reading TCNTL before exiting the break interrupt. Otherwise, TCNTL
retains the value latched during the break.
Reset the TIM counter before writing to the TIM counter modulo registers.
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Figure 8-6. TIM Counter Modulo Registers (TMODH:TMODL)
$0021
$0022
$0023
$0024
Bit15
Bit15
Bit 7
Bit 7
Bit 7
Bit 7
Bit7
Bit7
0
0
Figure 8-5. TIM Counter Registers (TCNTH:TCNTL)
1
1
= Unimplemented
TMODH
TMODL
TCNTH
TCNTL
Bit14
Bit14
Bit6
Bit6
MC68HC908JL3E Family Data Sheet, Rev. 4
6
0
6
0
6
1
6
1
Bit13
Bit13
Bit5
Bit5
5
0
5
0
5
1
5
1
NOTE
NOTE
Bit12
Bit12
Bit4
Bit4
4
0
4
0
4
1
4
1
Bit11
Bit11
Bit3
Bit3
3
0
3
0
3
1
3
1
Bit10
Bit10
Bit2
Bit2
2
0
2
0
2
1
2
1
Bit9
Bit1
Bit9
Bit1
1
0
1
0
1
1
1
1
Bit 0
Bit 0
Bit 0
Bit 0
Bit8
Bit0
Bit8
Bit0
0
0
1
1
I/O Registers
91
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