MCR908JL3ECFAE Freescale Semiconductor, MCR908JL3ECFAE Datasheet - Page 89
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MCR908JL3ECFAE
Manufacturer Part Number
MCR908JL3ECFAE
Description
IC MCU 4K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908JK1ECDWE.pdf
(180 pages)
Specifications of MCR908JL3ECFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LED, LVD, POR, PWM
Number Of I /o
23
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 12x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCR908JL3ECFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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8.8 I/O Signals
Port D shares two of its pins with the TIM. The two TIM channel I/O pins are PTD4/TCH0 and PTD5/TCH1.
Each channel I/O pin is programmable independently as an input capture pin or an output compare pin.
PTD4/TCH0 can be configured as a buffered output compare or buffered PWM pin.
8.9 I/O Registers
The following I/O registers control and monitor operation of the TIM:
8.9.1 TIM Status and Control Register (TSC)
The TIM status and control register does the following:
TOF — TIM Overflow Flag Bit
TOIE — TIM Overflow Interrupt Enable Bit
Freescale Semiconductor
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This read/write flag is set when the TIM counter reaches the modulo value programmed in the TIM
counter modulo registers. Clear TOF by reading the TIM status and control register when TOF is set
and then writing a zero to TOF. If another TIM overflow occurs before the clearing sequence is
complete, then writing zero to TOF has no effect. Therefore, a TOF interrupt request cannot be lost
due to inadvertent clearing of TOF. Reset clears the TOF bit. Writing a 1 to TOF has no effect.
This read/write bit enables TIM overflow interrupts when the TOF bit becomes set. Reset clears the
TOIE bit.
1 = TIM counter has reached modulo value
0 = TIM counter has not reached modulo value
1 = TIM overflow interrupts enabled
0 = TIM overflow interrupts disabled
TIM status and control register (TSC)
TIM counter registers (TCNTH:TCNTL)
TIM counter modulo registers (TMODH:TMODL)
TIM channel status and control registers (TSC0 and TSC1)
TIM channel registers (TCH0H:TCH0L and TCH1H:TCH1L)
Enables TIM overflow interrupts
Flags TIM overflows
Stops the TIM counter
Resets the TIM counter
Prescales the TIM counter clock
Address:
Reset:
Read:
Write:
$0020
Bit 7
TOF
0
0
Figure 8-4. TIM Status and Control Register (TSC)
= Unimplemented
TOIE
MC68HC908JL3E Family Data Sheet, Rev. 4
6
0
TSTOP
5
1
TRST
4
0
0
3
0
0
PS2
2
0
PS1
1
0
Bit 0
PS0
0
I/O Signals
89
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