MC9S08AC48CFDE Freescale Semiconductor, MC9S08AC48CFDE Datasheet - Page 88

IC MCU 8BIT 48K FLASH 48-QFN

MC9S08AC48CFDE

Manufacturer Part Number
MC9S08AC48CFDE
Description
IC MCU 8BIT 48K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08AC48CFDE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Processor Series
S08AC
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SCI, SPI
Operating Supply Voltage
- 0.3 V to + 5.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AC60E, DEMOACEX, DEMOACKIT, DCF51AC256, DC9S08AC128, DC9S08AC16, DC9S08AC60, DEMO51AC256KIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08AC48CFDE
Manufacturer:
INTEL
Quantity:
210
Chapter 6 Parallel Input/Output
88
PTASEn]
PTADSn
Reset
Reset
Field
Field
7:0
7:0
W
W
R
R
PTASE7
PTADS7
Output Slew Rate Control Enable for Port A Bits — Each of these control bits determine whether output slew
rate control is enabled for the associated PTA pin. For port A pins that are configured as inputs, these bits have
no effect.
0 Output slew rate control disabled for port A bit n.
1 Output slew rate control enabled for port A bit n.
Output Drive Strength Selection for Port A Bits — Each of these control bits selects between low and high
output drive for the associated PTA pin.
0 Low output drive enabled for port A bit n.
1 High output drive enabled for port A bit n.
0
0
7
7
PTASE6
PTADS6
Figure 6-5. Slew Rate Control Enable for Port A (PTASE)
Figure 6-6. Drive Strength Selection for Port A (PTADS)
0
0
6
6
Table 6-4. PTASE Register Field Descriptions
Table 6-5. PTADS Register Field Descriptions
PTASE5
PTADS5
MC9S08AC60 Series Data Sheet, Rev. 2
0
0
5
5
PTADS4
PTASE4
0
0
4
4
Description
Description
PTADS3
PTASE3
3
0
3
0
PTASE2
PTADS2
0
0
2
2
PTASE1
PTADS1
Freescale Semiconductor
0
0
1
1
PTASE0
PTADS0
0
0
0
0

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