C8051T612-GQ Silicon Laboratories Inc, C8051T612-GQ Datasheet - Page 117
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C8051T612-GQ
Manufacturer Part Number
C8051T612-GQ
Description
IC 8051 MCU 8K BYTE-PROG 32-LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051T61xr
Specifications of C8051T612-GQ
Program Memory Type
OTP
Program Memory Size
8KB (8K x 8)
Package / Case
32-LQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
29
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 21x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
29
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051FT610DK
Minimum Operating Temperature
- 40 C
On-chip Adc
21-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1439
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051T612-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051T612-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
21.2.3. Assigning Port I/O Pins to INT0 or INT1 external interrupts
INT0 and INT1 can be used to trigger an interrupt on any Port 0 I/O pin. These functions do not require
dedicated pins, meaning that they can function on both GPIO pins (PnSKIP = 1) and pins in use by the
crossbar (PnSKIP = 0). INT0 and INT1 cannot be used on pins configured for analog I/O. Table 21.3 shows
the available external digital event capture functions.
21.3. Priority Crossbar Decoder
The Priority Crossbar Decoder (Figure 21.3) assigns a priority to each I/O function, starting at the top with
UART0. When a digital resource is selected, the least-significant unassigned Port pin is assigned to that
resource (excluding UART0, which is always at pins 4 and 5). If a Port pin is assigned, the Crossbar skips
that pin when assigning the next selected resource. Additionally, the Crossbar will skip Port pins whose
associated bits in the PnSKIP registers are set. The PnSKIP registers allow software to skip Port pins that
are to be used for analog input, dedicated functions, or GPIO.
Important Note on Crossbar Configuration: If a Port pin is claimed by a peripheral without use of the
Crossbar, its corresponding PnSKIP bit should be set. This applies to P0.0 if VREF is used, P0.3 if the
external oscillator circuit is enabled, P0.6 if the ADC is configured to use the external conversion start sig-
nal (CNVSTR), and any selected ADC or Comparator inputs. The Crossbar skips selected pins as if they
were already assigned, and moves to the next unassigned pin. Figure 21.3 shows the potential pin assig-
ments available to the crossbar peripherals. Figure 21.4 and Figure 21.5 show two example crossbar con-
figurations, with and without skipping pins.
Registers XBR0 and XBR1 are used to assign the digital I/O resources to the physical I/O Port pins. Note
that when a peripheral is selected, the crossbar assigns all pins for that peripheral. UART0 pin assign-
ments are fixed for bootloading purposes: UART TX0 is always assigned to P0.4; UART RX0 is always
assigned to P0.5. Standard Port I/Os appear contiguously after the prioritized functions have been
assigned.
Important Note: The SPI can be operated in either 3-wire or 4-wire modes, pending the state of the
NSSMD1–NSSMD0 bits in register SPI0CN. According to the SPI mode, the NSS signal may or may not
be routed to a Port pin.
Digital Function
External Interrupt 0 (INT0)
External Interrupt 1 (INT1)
Table 21.3. Port I/O Assignment for INT0 and INT1 Functions
Potentially Assignable Port Pins
Rev 1.0
P0.0–P0.7
P0.0–P0.7
C8051T610/1/2/3/4/5/6/7
SFR(s) used for
Assignment
IT01CF
IT01CF
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