MC9S08QG8MPBE Freescale Semiconductor, MC9S08QG8MPBE Datasheet - Page 35
![IC MCU 8K FLASH 16-PDIP](/photos/12/33/123397/mc9s08qg8mpbe_sml.jpg)
MC9S08QG8MPBE
Manufacturer Part Number
MC9S08QG8MPBE
Description
IC MCU 8K FLASH 16-PDIP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08QG8CDTER.pdf
(314 pages)
Specifications of MC9S08QG8MPBE
Core Processor
HCS08
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
16-DIP (0.300", 7.62mm)
Processor Series
S08QG
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI/SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
1
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08QG8E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
DEMO9S08QG8E - BOARD DEMO FOR MC9S08QG8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Chapter 3
Modes of Operation
3.1
The operating modes of the MC9S08QG8/4 are described in this section. Entry into each mode, exit from
each mode, and functionality while in each mode are described.
3.2
3.3
Run is the normal operating mode for the MC9S08QG8/4. This mode is selected upon the MCU exiting
reset if the BKGD/MS pin is high. In this mode, the CPU executes code from internal memory with
execution beginning at the address fetched from memory at 0xFFFE:0xFFFF after reset.
3.4
The active background mode functions are managed through the background debug controller (BDC) in
the HCS08 core. The BDC, together with the on-chip debug module (DBG), provides the means for
analyzing MCU operation during software development.
Active background mode is entered in any of five ways:
Freescale Semiconductor
•
•
•
•
•
•
•
•
Active background mode for code development
Wait mode:
— CPU halts operation to conserve power
— System clocks running
— Full voltage regulation is maintained
Stop modes: CPU and bus clocks stopped
— Stop1: Full powerdown of internal circuits for maximum power savings
— Stop2: Partial powerdown of internal circuits; RAM contents retained
— Stop3: All internal circuits powered for fast recovery; RAM and register contents are retained
When the BKGD/MS pin is low during POR or immediately after issuing a background debug
force reset (see
When a BACKGROUND command is received through the BKGD pin
When a BGND instruction is executed
When encountering a BDC breakpoint
When encountering a DBG breakpoint
Introduction
Features
Run Mode
Active Background Mode
5.8.3, “System Background Debug Force Reset Register
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
(SBDFR)”)
33
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