MC9S08SH16CTL Freescale Semiconductor, MC9S08SH16CTL Datasheet - Page 51
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MC9S08SH16CTL
Manufacturer Part Number
MC9S08SH16CTL
Description
MCU 8BIT 16K FLASH 28-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Specifications of MC9S08SH16CTL
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-TSSOP
Processor Series
S08SH
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
23
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO, DEMO9S08SH32, DEMO9S08SH8
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Package
28TSSOP
Family Name
HCS08
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08SH16CTL
Manufacturer:
Freescale Semiconductor
Quantity:
135
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4.5.5
An access error occurs whenever the command execution protocol is violated.
Any of the following specific actions will cause the access error flag (FACCERR) in FSTAT to be set.
FACCERR must be cleared by writing a 1 to FACCERR in FSTAT before any command can be processed.
4.5.6
The block protection feature prevents the protected region of FLASH from program or erase changes.
Block protection is controlled through the FLASH protection register (FPROT). When enabled, block
protection begins at any 512 byte boundary below the last address of FLASH, 0xFFFF. (See
“FLASH Protection Register (FPROT and
After exit from reset, FPROT is loaded with the contents of the NVPROT location, which is in the
nonvolatile register block of the FLASH memory. FPROT cannot be changed directly from application
software so a runaway program cannot alter the block protection settings. Because NVPROT is within the
last 512 bytes of FLASH, if any amount of memory is protected, NVPROT is itself protected and cannot
be altered (intentionally or unintentionally) by the application software. FPROT can be written through
background debug commands, which allows a way to erase and reprogram a protected FLASH memory.
The block protection mechanism is illustrated in
last address of unprotected memory. This address is formed by concatenating FPS7:FPS1 with logic 1 bits
as shown. For example, to protect the last 1536 bytes of memory (addresses 0xFA00 through 0xFFFF), the
FPS bits must be set to 1111 100, which results in the value 0xF9FF as the last address of unprotected
memory. In addition to programming the FPS bits to the appropriate value, FPDIS (bit 0 of NVPROT) must
Freescale Semiconductor
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Writing to a FLASH address before the internal FLASH clock frequency has been set by writing
to the FCDIV register
Writing to a FLASH address while FCBEF is not set (A new command cannot be started until the
command buffer is empty.)
Writing a second time to a FLASH address before launching the previous command (There is only
one write to FLASH for every command.)
Writing a second time to FCMD before launching the previous command (There is only one write
to FCMD for every command.)
Writing to any FLASH control register other than FCMD after writing to a FLASH address
Writing any command code other than the five allowed codes (0x05, 0x20, 0x25, 0x40, or 0x41)
to FCMD
Writing any FLASH control register other than the write to FSTAT (to clear FCBEF and launch the
command) after writing the command to FCMD
The MCU enters stop mode while a program or erase command is in progress (The command is
aborted.)
Writing the byte program, burst program, or page erase command code (0x20, 0x25, or 0x40) with
a background debug command while the MCU is secured (The background debug controller can
only do blank check and mass erase commands when the MCU is secure.)
Writing 0 to FCBEF to cancel a partial command
Access Errors
FLASH Block Protection
MC9S08SH32 Series Data Sheet, Rev. 2
NVPROT)”).
PRELIMINARY
Figure
4-4. The FPS bits are used as the upper bits of the
Chapter 4 Memory
Section 4.7.4,
51
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