MC9S08SH16CTL Freescale Semiconductor, MC9S08SH16CTL Datasheet - Page 171
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MC9S08SH16CTL
Manufacturer Part Number
MC9S08SH16CTL
Description
MCU 8BIT 16K FLASH 28-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Specifications of MC9S08SH16CTL
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-TSSOP
Processor Series
S08SH
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
23
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO, DEMO9S08SH32, DEMO9S08SH8
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Package
28TSSOP
Family Name
HCS08
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08SH16CTL
Manufacturer:
Freescale Semiconductor
Quantity:
135
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11.1.2
Key features of the ICS module follow. For device specific information, refer to the ICS Characteristics in
the Electricals section of the documentation.
11.1.3
Figure 11-2
Freescale Semiconductor
•
•
•
•
•
•
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Frequency-locked loop (FLL) is trimmable for accuracy
— 0.1% resolution using internal 32kHz reference and 9-bit TRIM:FTRIM
— 2% deviation over voltage and temperature using internal 32kHz reference
Internal or external reference clocks up to 5MHz can be used to control the FLL
— 3 bit select for reference divider is provided
Internal reference clock has 9 trim bits available
Internal or external reference clocks can be selected as the clock source for the MCU
Whichever clock is selected as the source can be divided down
— 2 bit select for clock divider is provided
Control signals for a low power oscillator as the external reference clock are provided
— HGO, RANGE, EREFS, ERCLKEN, EREFSTEN
FLL Engaged Internal mode is automatically selected out of reset
– Allowable dividers are: 1, 2, 4, 8
– BDC clock is provided as a constant divide by 2 of the DCO output
Features
Block Diagram
is the ICS block diagram.
MC9S08SH32 Series Data Sheet, Rev. 2
PRELIMINARY
Chapter 11 Internal Clock Source (S08ICSV2)
171
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