MC9S08MP16VLF Freescale Semiconductor, MC9S08MP16VLF Datasheet - Page 8

MCU 8BIT .25U SGF FLASH 48-LQFP

MC9S08MP16VLF

Manufacturer Part Number
MC9S08MP16VLF
Description
MCU 8BIT .25U SGF FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08MP16VLF

Core Processor
HCS08
Core Size
8-Bit
Speed
51.34MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
40
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 13x12b, D/A 3x5b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Processor Series
S08MP
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI
Maximum Clock Frequency
51.34 MHz
Number Of Programmable I/os
40
Number Of Timers
2
Operating Supply Voltage
- 0.3 V to + 5.8 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08MP16
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 13 Channel
On-chip Dac
3 DAC, 5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08MP16VLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Electrical Characteristics
2
2.1
This section contains electrical and timing specifications for the MC9S08MP16 Series of microcontrollers available at the time
of publication.
8
Electrical Characteristics
Introduction
1
2
3
4
5
6
TCLK pin can be repositioned using TCLKPS in SOPT2. Default reset location is PTC7.
HSCMP2 output CMP2OUT can be repositioned using the CMP2OPS in the SOPT2 register.
Default reset location is PTD6.
HSCMP3 output CMP3OUT can be repositioned using the CMP3OPS in the SOPT2 register.
Default reset location is PTD7.
Pin is open drain with an internal pullup that is always enabled. Pin does not contain a clamp
diode to V
pulled up RESET will not be pulled to V
to V
IIC pins SDA and SCL can be repositioned using IICPS in SOPT2. Default reset locations are
PTD0 and PTD1.
If ADC, HSCMP, or PGA is enabling a shared analog input pin, each has access to the pin.
48
35
36
37
38
39
40
41
42
43
44
45
46
47
48
DD
.
Pin Number
LQFP
DD
Table 1. Pin Availability by Package Pin-Count (continued)
32
23
24
25
26
27
28
29
30
31
32
1
2
and should not be driven above V
28
25
26
27
28
1
2
3
4
MC9S08MP16 Series Data Sheet, Rev. 1
PTE4
PTB4
PTB5
PTB6
PTB7
PTE5
PTE6
PTF0
PTC0
PTC1
PTC2
PTC3
Port Pin
DD
. The internal gates connected to this pin are pulled
KBI1P4
KBI1P5
KBI1P6
KBI1P7
XTAL
EXTAL
BKGD
KBI2P0
KBI2P1
KBI2P2
KBI2P3
<-- Lowest
Alt 1
DD
. The voltage measured on the internally
ADP12
CMP2OUT
CMP3OUT
MS
FTM2CH0
FTM2CH1
FTM2CH2
FTM2CH3
Priority
Alt 2
6
2
3
--> Highest
C1IN4
ADP4
ADP5
ADP6
ADP7
Alt3
6
6
6
6
6
C2IN3
C2IN4
C3IN3
C3IN4
V
V
SS2
DD2
Freescale Semiconductor
Alt4
6
6
6
6

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