C8051T605-GS Silicon Laboratories Inc, C8051T605-GS Datasheet - Page 2
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C8051T605-GS
Manufacturer Part Number
C8051T605-GS
Description
IC 8051 MCU 2K-EEPROM 14-SOIC
Manufacturer
Silicon Laboratories Inc
Series
C8051T60xr
Datasheet
1.C8051T600EDB.pdf
(188 pages)
Specifications of C8051T605-GS
Program Memory Type
OTP
Program Memory Size
2KB (2K x 8)
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C/SMBus/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
8
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051T600DK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1404 - KIT DEV FOR C8051T60X MCU'S
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1661-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051T605-GS
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
C8051T600/1/2/3/4/5/6
Table of Contents
1. System Overview ..................................................................................................... 13
2. Ordering Information ............................................................................................... 16
3. Pin Definitions.......................................................................................................... 17
4. QFN-11 Package Specifications ............................................................................. 22
5. SOIC-14 Package Specifications ............................................................................ 24
6. MSOP-10 Package Specifications .......................................................................... 26
7. QFN-10 Package Specifications ............................................................................. 28
8. Electrical Characteristics ........................................................................................ 30
9. 10-Bit ADC (ADC0, C8051T600/2/4 only)................................................................ 40
10. Temperature Sensor (C8051T600/2/4 only) ......................................................... 52
11. Voltage Reference Options ................................................................................... 55
12. Voltage Regulator (REG0) ..................................................................................... 57
13. Comparator0........................................................................................................... 59
14. CIP-51 Microcontroller........................................................................................... 65
15. Memory Organization ............................................................................................ 74
16. Special Function Registers................................................................................... 77
17. Interrupts ................................................................................................................ 80
2
8.1. Absolute Maximum Specifications..................................................................... 30
8.2. Electrical Characteristics ................................................................................... 31
8.3. Typical Performance Curves ............................................................................. 38
9.1. Output Code Formatting .................................................................................... 41
9.2. 8-Bit Mode ......................................................................................................... 41
9.3. Modes of Operation ........................................................................................... 41
9.4. Programmable Window Detector....................................................................... 47
9.5. ADC0 Analog Multiplexer (C8051T600/2/4 only)............................................... 50
10.1. Calibration ....................................................................................................... 52
13.1. Comparator Multiplexer ................................................................................... 63
14.1. Instruction Set.................................................................................................. 66
14.2. CIP-51 Register Descriptions .......................................................................... 71
15.1. Program Memory............................................................................................. 74
15.2. Data Memory ................................................................................................... 75
17.1. MCU Interrupt Sources and Vectors................................................................ 81
9.3.1. Starting a Conversion................................................................................ 41
9.3.2. Tracking Modes......................................................................................... 42
9.3.3. Settling Time Requirements...................................................................... 43
9.4.1. Window Detector Example........................................................................ 49
14.1.1. Instruction and CPU Timing .................................................................... 66
15.2.1. Internal RAM ........................................................................................... 75
17.1.1. Interrupt Priorities.................................................................................... 81
17.1.2. Interrupt Latency ..................................................................................... 81
15.2.1.1. General Purpose Registers ............................................................ 76
15.2.1.2. Bit Addressable Locations .............................................................. 76
15.2.1.3. Stack ............................................................................................ 76
Rev. 1.2