STR911FAW47X6 STMicroelectronics, STR911FAW47X6 Datasheet - Page 17

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STR911FAW47X6

Manufacturer Part Number
STR911FAW47X6
Description
MCU ARM9 2048KB FLASH 128LQFP
Manufacturer
STMicroelectronics
Series
STR9r
Datasheet

Specifications of STR911FAW47X6

Core Processor
ARM9
Core Size
32-Bit
Speed
96MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
2MB (2M x 8)
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-LQFP
Processor Series
STR911x
Core
ARM966E-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
96 KB
Interface Type
CAN, SPI, UART
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
80
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, MCBSTR9, MCBSTR9U, MCBSTR9UME, MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
MCBSTR9UME - BOARD EVAL MCBSTR9 + ULINK-MEMCBSTR9U - BOARD EVAL MCBSTR9 + ULINK2MCBSTR9 - BOARD EVAL STM STR9 SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STR911FAW47X6
Manufacturer:
STMicroelectronics
Quantity:
10 000
STR91xFAxxx
3.8
3.8.1
Table 5.
Production salestype
STR91xFAx46xx
STR91xFAx47xx
STR91xFAxxxxx
STR91xFAxxxxx
STR91xFAxxxxx
Table 4.
One-time-programmable (OTP) memory
There are 32 bytes of OTP memory ideally suited for serial numbers, security keys, factory
calibration constants, or other permanent data constants. These OTP data bytes can be
programmed only one time through either the JTAG interface or by the CPU, and these
bytes can never be altered afterwards. As an option, a “lock bit” can be set by the JTAG
interface or the CPU which will block any further writing to the this OTP area. The “lock bit”
itself is also OTP. If the OTP array is unlocked, it is always possible to go back and write to
an OTP byte location that has not been previously written, but it is never possible to change
an OTP byte location if any one bit of that particular byte has been written before. The last
two OTP bytes (bytes 31 and 30) are reserved for the STR91xFA product ID and revision
level.
Product ID and revision level
OTP bytes 31 and 30 are programmed at ST factory before shipment and may be read by
firmware to determine the STR91xFA product type and silicon revision so it can optionally
take action based on the silicon on which it is running. In Rev H devices and 1MB/2MB Rev
A devices, byte 31 contains the major family identifier of "9" (for STR9) in the high-nibble
location and the minor family identifier in the low nibble location, which can be used to
determine the size of primary flash memory. In all devices, byte 30 contains the silicon
revision level indicator. See
devices and size of primary Flash memory. See
identification of silicon revisions.
Product ID and revision level values
Size of secondary Flash
Size of each sector
Number of sectors
Sectoring of secondary Flash memory
Silicon revision
Rev G
Rev H
Rev H
Rev A
Rev A
Table 5
Doc ID 13495 Rev 6
for values related to the revisions of STR9 production
Size of primary Flash
256K or 512K
1024K
2048K
256K
512K
Section 8
32 Kbytes
8 Kbytes
4
for details of external
OTP byte 31
91h
90h
91h
92h
93h
Functional overview
128 Kbytes
16 Kbytes
8
OTP byte 30
21h
21h
21h
21h
20h
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